参数资料
型号: LTC1067-50CGN#PBF
厂商: Linear Technology
文件页数: 6/20页
文件大小: 0K
描述: IC FILTR BLDNGBLK R-R DUAL16SSOP
标准包装: 100
滤波器类型: 通用开关电容器
频率 - 截止或中心: 40kHz
滤波器数: 2
滤波器阶数: 4th
电源电压: 2.7 V ~ 11 V,±2.7 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-SSOP
包装: 管件
14
LTC1067/LTC1067-50
APPLICATIONS INFORMATION
WU
U
Many applications are more concerned with the negative
output swing than the positive output swing. Interfacing to
an ADC running on a single 5V supply with a 4.096
reference voltage is a standard example. The LTC1067 or
LTC1067-50 will easily reach the 4.096V level for a full-
scale reading. The issue is how close does the output go
to ground. The further the output is from ground, the more
codes that are essentially lost. The previous example
demonstrated that the lowest output voltage would be
about 250mV, although, as is shown below, 15mV is
achievable.
To achieve a lower negative output swing voltage, the
AGND voltage must be adjusted down below the midpoint.
The AGND voltage is determined by two equal, on-chip
resistors. These resistors are typically 15k each. While the
ratio of these two resistors is tightly matched, the absolute
value of the resistors is not tightly controlled. Adjusting
the AGND voltage by simply adding an external resistor
can be done, but caution must be exercised.
In Figure 13, a resistor is used to adjust the AGND voltage
for use with a 5V powered ADC with a full-scale input of
4.096V. The resistor value was chosen carefully to assure
that a 4.096V input signal to the filter yields a full-scale
reading from the ADC and a 0V input signal gives the
lowest possible value (15mV for the LTC1067 and 10mV
for the LTC1067-50). The circuit works well over tempera-
ture and part variations. For this application, the 5V supply
must be above 4.75V.
LOAD RESISTANCE (k
TO V)
POSITIVE
OUTPUT
VOLTAGE
SWING
(V)
5.0
4.5
4.0
3.5
3.0
2.5
1067 F11
10
0
2
4
6
8
12 14 16 18 20
LTC1067-50
LTC1067
Figure 11. LTC1067/LTC1067-50 Positive Output Voltage
Swing vs Load Resistance, 5V Supply
the output of the first section is near the positive rail
(operating modes invert the signal). The output of the first
stage will saturate at about 250mV (typical for 5V supply)
from positive supply. The output from the second stage
will be 250mV from the negative supply rail (assuming
inversion again) even though the op amp’s output is
capable of swinging to within 15mV.
The positive output voltage swing being less than the
negative swing, coupled with the AGND potential set at the
midpoint of the supplies and inverting of the signal, yields
the following equation for peak-to-peak output swing:
VP-P Swing = (V + – V ) – 2(V+ – VPOSITIVE SWING)
LOAD RESISTANCE (k
TO V)
POSITIVE
OUTPUT
VOLTAGE
SWING
(V)
3.3
3.0
2.7
2.4
2.1
1.8
1.5
1067 F12
10
0
2
4
6
8
12 14 16 18 20
LTC1067-50
VS = 3V
LTC1067
VS = 3.3V
Figure 12. LTC1067/LTC1067-50 Positive Output Voltage
Swing vs Load Resistance, 3.3V/3V Supplies
0.1
F
1067 F13
64.9k
1%
LTC1067
LTC1067-50
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V+
NC
V+
SA
LPA
BPA
HPA/NA
INV A
CLK
AGND
V
SB
LPB
BPB
HPB/NB
INV B
5V
(4.75VMIN)
1
F
Figure 13. Power and AGND Connections for
5V ADC with 4.096V Full Scale
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