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参数资料
| 型号： | LTC1142CG#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 28-SSOP |
| 标准包装： | 2,000 |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 250kHz |
| 占空比： | 100% |
| 电源电压： | 3.5 V ~ 18 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 包装： | 带卷 (TR) |
LTC1142/LTC1142L/LTC1142HV
APPLICATIO S I FOR ATIO
eased at the expense of efficiency. If too small an inductor
is used, the inductor current will decrease past zero and
change polarity. A consequence of this is that the LTC1142
may not enter Burst Mode operation and efficiency will be
severely degraded at low currents.
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. The highest efficiency will be
obtained using ferrite, molypermalloy (MPP), or Kool M μ ?
cores. Lower cost powdered iron cores provide suitable
performance, but cut efficiency by 3% to 7%. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductance selected. As induc-
tance increases, core losses go down. Unfortunately,
increased inductance requires more turns of wire and
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be
used. For V IN > 8V, standard threshold MOSFETs
(V GS(TH) < 4V) may be used. If V IN is expected to drop
below 8V, logic-level threshold MOSFETs (V GS(TH) <
2.5V) are strongly recommended. When logic-level
MOSFETs are used, the LTC1142 supply voltage must
be less than the absolute maximum V GS ratings for the
MOSFETs.
The maximum output current I MAX determines the R DS(ON)
requirement for the two MOSFETs. When the LTC1142 is
operating in continuous mode, the simplifying assump-
tion can be made that one of the two MOSFETs is always
conducting the average load current. The duty cycles for
the two MOSFETs are given by:
therefore copper losses will increase.
Ferrite designs have very low core loss, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
P-Ch Duty Cycle =
N-Ch Duty Cycle =
V OUT
V IN
V IN ? V OUT
V IN
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
From the duty cycles the required R DS(ON) for each
MOSFET can be derived:
( )
V OUT ? I MAX ? 1 + δ P
ripplewhichcancauseBurstModeoperationtobefalsely
triggered. Do not allow the core to saturate!
Kool M μ (from Magnetics, Inc.) is a very good, low loss
core material for toroids with a “soft” saturation charac-
teristic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies, but it is quite a bit more
expensive. Toroids are very space efficient, especially
P-Ch R DS(ON) =
N-Ch R DS(ON) =
V IN ? P P
2
V IN ? P N
( V IN ? V OUT ) ? I MAX 2 ? ( 1 + δ N )
when you can use several layers of wire. Because they
generally lack a bobbin, mounting is more difficult. How-
ever, new designs for surface mount are available from
Coiltronics and Beckman Industrial Corporation which do
not increase the height significantly.
Power MOSFET and D1, D2 Selection
Two external power MOSFETs must be selected for use with
each section of the LTC1142: a P-channel MOSFET for the
main switch, and an N-channel MOSFET for the synchronous
switch. The main selection criteria for the power MOSFETs
are the threshold voltage V GS(TH) and on- resistance R DS(ON) .
where P P and P N are the allowable power dissipations and
δ P and δ N are the temperature dependencies of R DS(ON) .
P P and P N will be determined by efficiency and/or thermal
requirements (see Efficiency Considerations). (1 + δ ) is
generally given for a MOSFET in the form of a normalized
R DS(ON) vs Temperature curve, but δ = 0.007/ ° C can be
used as an approximation for low voltage MOSFETs.
The Schottky diodes D1 and D2 shown in Figure 1 only
conduct during the dead-time between the conduction of
the respective power MOSFETs. The sole purpose of D1
and D2 is to prevent the body diode of the N-channel
MOSFET from turning on and storing charge during the
Kool M μ is a registered trademark of Magnetics, Inc.
11
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| LTC1142HV | 制造商:LINER 制造商全称:Linear Technology 功能描述:Dual High Efficiency Synchronous Step-Down Switching Regulators |
| LTC1142HV-ADJ | 制造商:LINER 制造商全称:Linear Technology 功能描述:Dual High Efficiency Synchronous Step-Down Switching Regulators |
| LTC1142HVCG | 功能描述:IC REG CTRLR BUCK PWM CM 28-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC1142HVCG#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 28-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC1142HVCG#TR | 功能描述:IC REG CTRLR BUCK PWM CM 28-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
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