参数资料
型号: LTC1196-2ACS8#TR
厂商: Linear Technology
文件页数: 18/28页
文件大小: 0K
描述: IC ADC 8BIT 1MHZ SHUTDOWN 8SOIC
标准包装: 2,500
位数: 8
采样率(每秒): 1M
数据接口: 串行
转换器数目: 1
功率耗散(最大): 50mW
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极
LTC1196/LTC1198
25
119698fb
TYPICAL APPLICATIONS
The timing diagram of Figure 16 was obtained from the
circuit of Figure 15. The CLK was 5MHz for the timing
diagram and the TMS320C25 clock rate was 40MHz.
Figure 17 shows the timing diagram with the LTC1198
running off a 2.7V supply and 5MHz CLK.
Software Description
The software congures and controls the serial port of
the TMS320C25.
The code rst sets up the interrupt and reset vectors. On
reset the TMS320C25 starts executing code at the label
INIT. Upon completion of a 16-bit data transfer, an inter-
rupt is generated and the DSP will begin executing code
at the label RINT.
In the beginning, the code initializes registers in the
TMS320C25 that will be used in the transfer routine. The
interrupts are temporarily disabled. The data memory page
pointer register is set to zero. The auxiliary register pointer
is loaded with one and auxiliary register one is loaded with
the value 200 hexadecimal. This is the data memory loca-
tion where the data from the LTC1198 will be stored. The
interrupt mask register (IMR) is congured to recognize
the RINT interrupt, which is generated after receiving the
last of 16 bits on the serial port. This interrupt is still dis-
abled at this time. The transmit framing synchronization
pin (FSX) is congured to be an output. The F0 bit of the
status register ST1, is initialized to zero which sets up the
serial port to operate in the 16-bit mode.
Next, the code in TXRX routine starts to transmit and
receive data. The DIN word is loaded into the ACC and
shifted left eight times so that it appears as in Figure 18.
This DIN word congures the LTC1198 for CH0 with respect
to CH1. The DIN word is then put in the transmit register
and the RINT interrupt is enabled. The NOP is repeated
3 times to mask out the interrupts and minimize the cycle
time of the conversion to be 20 clock cycles. All clocking
and CS functions are performed by the hardware.
CS
CLK
DIN
VER
TICAL:
5V
/DIV
DOUT
NULL
BITS
MSB
(B7)
HORIZONTAL: 1500ns/DIV
LSB
(B0)
1196/98 F16
Figure 16. Scope Trace the LTC1198 Running Off
5V Supply in the Circuit of Figure 15
CS
CLK
DIN
VER
TICAL:
5V
/DIV
DOUT
NULL
BITS
MSB
(B7)
HORIZONTAL: 500ns/DIV
LSB
(B0)
1196/98 F17
Figure 17. Scope Trace the LTC1198 Running Off
1.7V Supply in the Circuit of Figure 15
L1196/98 F18
B15
B8
0
1
START
0
S/D
0
O/S
0
DUMMY
1
DUMMY
0
Figure 18. DIN Word in ACC of TMS20C25 for the
Circuit in Figure 15
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