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参数资料
| 型号： | LTC1273ACSW#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV 12BIT SAMPLNG 24SOIC |
| 标准包装： | 1,000 |
| 位数： | 12 |
| 采样率（每秒）： | 300k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 75mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个单端，单极；1 个单端，双极 |
12
LTC1273
LTC1275/LTC1276
127356fa
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Figure 5 shows the IMD performance at a 30kHz input.
FREQUENCY (kHz)
0
–120
AMPLITUDE
(dB)
–100
–80
–60
–40
40
80
120
160
LTC1273/75/76 F05
–20
0
20
60
100
140
fSAMPLE = 300kHz
fIN1 = 29.37kHz
fIN2 = 32.446kHz
Figure 5. Intermodulation Distortion Plot
the analog input must settle after the small current spike
before the next conversion starts. Any op amp that settles
in 600ns to small current transients will allow maximum
speed operation. If slower op amps are used, more settling
time can be provided by increasing the time between
conversions. Suitable devices capable of driving the ADCs’
AIN input include the LT1190/LT1191, LT1007, LT1220,
LT1223 and LT1224 op amps.
The analog input tolerates source resistance very well.
Here again, the only requirement is that the analog input
must settle before the next conversion starts. For larger
source resistance, full DC accuracy can be obtained if
more time is allowed between conversions. For more
information, see the Acquisition Time vs Source Resis-
tance curve in the Typical Performance Characteristics
section. For optimum frequency domain performance
[e.g., S/(N + D)], keep the source resistance below 100
.
Internal Reference
The LTC1273/LTC1275/LTC1276 have an on-chip, tem-
perature compensated, curvature corrected, bandgap ref-
erence which is factory trimmed to 2.42V. It is internally
connected to the DAC and is available at pin 2 to provide
up to 1mA current to an external load.
For minimum code transition noise the reference output
should be decoupled with a capacitor to filter wideband
noise from the reference (10
F tantalum in parallel with a
0.1
F ceramic).
In the LTC1275, the VREF pin can be driven above its
normal value with a DAC or other means to provide input
span adjustment or to improve the reference temperature
drift. Figure 6 shows an LT1006 op amp driving the
VREF(OUT) ≥ 2.45V
3
INPUT RANGE
±1.033VREF(OUT)
–
+
LT1006
LTC1275
AIN
AGND
VREF
10
F
LTC1273/75/76 F06
Figure 6. Driving the VREF with the LT1006 Op Amp
Peak Harmonic or Spurious Noise
The peak harmonic or spurious noise is the largest spec-
tral component excluding the input signal and DC. This
value is expressed in decibels relative to the RMS value of
a full scale input signal.
Full Power and Full Linear Bandwidth
The full power bandwidth is that input frequency at which
the amplitude of the reconstructed fundamental is re-
duced by 3dB for a full scale input signal.
The full linear bandwidth is the input frequency at which
the S/(N + D) has dropped to 68dB (11 effective bits). The
LTC1273/LTC1275/LTC1276 have been designed to opti-
mize input bandwidth, allowing ADCs to undersample
input signals with frequencies above the converters’ Nyquist
Frequency. The noise floor stays very low at high frequen-
cies; S/(N + D) becomes dominated by distortion at
frequencies far beyond Nyquist.
Driving the Analog Input
The analog inputs of the LTC1273/LTC1275/LTC1276 are
easy to drive. They draw only one small current spike while
charging the sample-and-hold capacitor at the end of
conversion. During conversion the analog input draws no
current. The only requirement is that the amplifier driving
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