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| 型号： | LTC1282BCSW |
| 厂商： | Linear Technology |
| 文件页数： | 7/24页 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV SAMPLING W/REF24SOIC |
| 标准包装： | 32 |
| 位数： | 12 |
| 采样率（每秒）： | 140k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 24mW |
| 电压电源： | 双 ± |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极；1 个单端，双极 |
| 产品目录页面： | 1346 (CN2011-ZH PDF) |
| 其它名称： | LTC1282BCS |
15
LTC1282
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
LTC1282 F13
AIN
AGND
VREF
VDD
DGND
LTC1282
DIGITAL
SYSTEM
0.1
F
+
–
ANALOG GROUND PLANE
GROUND CONNECTION
TO DIGITAL CIRCUITRY
ANALOG
INPUT
CIRCUITRY
3
2
24
12
1
0.1
F
10
F
10
F
Figure 13. Power Supply Grounding Practice
Noise: Input signal leads to AIN and signal return leads
from AGND (Pin 3) should be kept as short as possible to
minimize input noise coupling. In applications where this
is not possible, a shielded cable between source and ADC
is recommended. Also, since any potential difference in
grounds between the signal source and ADC appears as
an error voltage in series with the input signal, attention
should be paid to reducing the ground circuit imped-
ances as much as possible.
A single point analog ground separate from the logic
system ground should be established with an analog
ground plane at pin 3 (AGND) or as close as possible to the
ADC, as shown in Figure 13. Pin 12 ( DGND) and all other
analog grounds should be connected to this single analog
ground point. No other digital grounds should be con-
nected to this analog ground point. Low impedance analog
and digital power supply common returns are essential to
low noise operation of the ADC and the foil width for these
tracks should be as wide as possible.
In applications where the ADC data outputs and control
signals are connected to a continuously active micropro-
cessor bus, it is possible to get errors in conversion
results. These errors are due to feedthrough from the
microprocessor to the successive approximation com-
parator. The problem can be eliminated by forcing the
microprocessor into a WAIT state during conversion or by
using three-state buffers to isolate the ADC data bus.
DIGITAL INTERFACE
The ADC is designed to interface with microprocessors as
a memory mapped device. The CS and RD control inputs
are common to all peripheral memory interfacing. The
HBEN input serves as a data byte select for 8-bit proces-
sors and is normally either connected to the microproces-
sor address bus or grounded.
Connecting to 5V Logic Systems
The LTC1282 interfaces well to 5V logic because the ESD
clamps on the inputs do not clamp to the positive supply
(see Figure 14). Inputs of 0V to 5V do not bother the ADC
at all. In addition, the 0V to 3V outputs of the 3V ADC are
more than adequate to meet TTL input levels in the 5V
logic. (5V logic with CMOS input levels requires a level
shift.)
Figure 14. 3V ADC ESD Protection Handles
0V to 5V Swings Easily
LTC1282
3V ADC
3V
LTC1282 F14
ADC OUTPUTS
0V TO 3V
5V
ADC INPUTS
0V TO 5V
TTL
INPUT
LEVELS
CMOS
OUTPUT
LEVELS
5V
LOGIC
LTC ESD
CLAMP
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