参数资料
型号: LTC1288CN8
厂商: Linear Technology
文件页数: 5/24页
文件大小: 0K
描述: IC A/D CONV SAMPLING 12BIT 8-DIP
标准包装: 50
位数: 12
采样率(每秒): 6.6k
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
功率耗散(最大): 630µW
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
输入数目和类型: 2 个单端,单极
13
LTC1285/LTC1288
APPLICATION INFORMATION
WU
U
Transfer Curve
The LTC1285/LTC1288 are permanently configured for
unipolar only. The input span and code assignment for
this conversion type are shown in the following figures.
0V
1LSB
V
REF
–2LSB
VREF
4096
V
REF
–1LSB
V
REF
VIN
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
LTC1285/88 AI04
1LSB =
Transfer Curve
OUTPUT CODE
1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
INPUT VOLTAGE
VREF – 1LSB
VREF – 2LSB
1LSB
0V
INPUT VOLTAGE
(VREF = 5.000V)
4.99878V
4.99756V
0.00122V
0V
LTC1285/88 AI05
Output Code
Operation with DIN and DOUT Tied Together
The LTC1288 can be operated with DIN and DOUT tied
together. This eliminates one of the lines required to
communicate to the microprocessor (MPU). Data is trans-
mitted in both directions on a single wire. The processor
pin connected to this data line should be configurable as
either an input or an output. The LTC1288 will take control
of the data line and drive it low on the 4th falling CLK edge
after the start bit is received (see Figure 3). Therefore the
processor port line must be switched to an input before
this happens to avoid a conflict.
In the Typical Applications section, there is an example of
interfacing the LTC1288 with DINand DOUT tied together to
the Intel 8051 MPU.
ACHIEVING MICROPOWER PERFORMANCE
With typical operating currents of 160
A and automatic
shutdown between conversions, the LTC1285/LTC1288
achieves extremely low power consumption over a wide
range of sample rates (see Figure 4). The auto-shutdown
allows the supply curve to drop with reduced sample rate.
Figure 3. LTC1288 Operation with DIN and DOUT Tied Together
1
2
3
4
CS
CLK
DATA
(DIN/DOUT)
START
SGL/DIFF
ODD/SIGN
MSBF
B11
B10
MSBF BIT LATCHED
BY LTC1288
LTC1288 CONTROLS DATA LINE AND SENDS
A/D RESULT BACK TO MPU
MPU CONTROLS DATA LINE AND SENDS
MUX ADDRESS TO LTC1288
PROCESSOR MUST RELEASE DATA LINE AFTER
4TH RISING CLK AND BEFORE THE 4TH FALLING CLK
LTC1288 TAKES CONTROL OF DATA LINE
ON 4TH FALLING CLK
LTC1285/88 F03
SAMPLE FREQUENCY (kHz)
0.1
1
SUPPLY
CURRENT
(
A)
10
100
1000
1
10
100
LTC1285/88 F04
TA = 25°C
VCC = 2.7V
VREF = 2.5V
fCLK = 120kHz
Figure 4. Automatic Power Shutdown Between Conversions
Allows Power Consumption to Drop with Sample Rate
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