参数资料
型号: LTC1293CCSW#TRPBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC DATA ACQ SYSTEM 12BIT 16-SOIC
标准包装: 1,000
类型: 数据采集系统(DAS),ADC
分辨率(位): 12 b
采样率(每秒): 46.5k
数据接口: 串行,并联
电压电源: 双 ±
电源电压: ±5V,5V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
22
LTC1293/LTC1294/LTC1296
129346fs
LTC1293/4/6 AC Characteristics
Two commonly used figures of merit for specifying the
dynamic performance of the A/Ds in digital signal process-
ing applications are the Signal-to-Noise Ratio (SNR) and
the “effective number of bits”(ENOB). SNR is the ratio of
the RMS magnitude of the fundamental to the RMS
magnitude of all the non-fundamental signals up to the
Nyquist frequency (half the sampling frequency). The
theoretical maximum SNR for a sine wave input is given
by:
SNR = (6.02N + 1.76dB)
where N is the number of bits. Thus the SNR depends on
the resolution of the A/D. For an ideal 12-bit A/D the SNR
is equal to 74dB. A Fast Fourier Transform (FFT) plot of the
output spectrum of the LTC1294 is shown in Figures 16a
and 16b. The input (fIN) frequencies are 1kHz and 22kHz
with the sampling frequency (fS) at 45.4kHz. The SNR
obtained from the plot are 72.7dB and 72.5dB.
Rewriting the SNR expression it is possible to obtain the
equivalent resolution based on the SNR measurement.
This is the so-called effective number of bits (ENOB). For
the example shown in Figures 16a and 16b, N = 11.8 bits.
Figure 17 shows a plot of ENOB as a function of input
frequency. The top curve shows the A/D’s ENOB remains
at 11.8 for input frequencies up to fS/2 with ±5V supplies.
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
a 1.25 reference. If this offset is unacceptable, it can be
corrected digitally by the receiving system or by offsetting
the “–” input to the LTC1293/4/6.
Noise with Reduced VREF
The total input referred noise of the LTC1293/4/6 can be
reduced to approximately 200
V peak-to-peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference inputs. This noise
is insignificant with a 5V reference input but will become
a larger fraction of an LSB as the size of the LSB is reduced.
The typical performance characteristic curve of Noise
Error vs Reference Voltage shows the LSB contribution of
this 200
V of noise.
For operation with a 5V reference, the 200
V noise is only
0.16LSB peak-to-peak. Here the LTC1293/4/6 noise will
contribute virtually no uncertainty to the output code. For
reduced references, the noise may become a significant
fraction of an LSB and cause undesirable jitter in the
output code. For example, with a 1.25V reference, this
200
V noise is 0.64LSB peak-to-peak. This will reduce
the range of input voltages over which a stable output code
can be achieved by 0.64LSB. Now averaging readings may
be necessary.
This noise data was taken in a very clean test fixture. Any
setup induced noise (noise or ripple on VCC, VREF or VIN)
will add to the internal noise. The lower the reference
voltage used, the more critical it becomes to have a noise-
free setup.
Gain Error due to Reduced VREF
The gain error of the LTC1294/6 is very good over a wide
range of reference voltages. The error component that is
seen in the typical performance characteristics curve
Change in Gain Error vs Reference Voltage for the LTC1293
is due the voltage drop on the AGND pin from the device
to the ground plane. To minimize this error the LTC1293
should be soldered directly onto the PC board. The internal
reference point for VREF is tied to AGND. Any voltage drop
in the AGND pin will make the reference voltage, internal
to the device, less than what is applied externally (Figure
15). This drop is typically 400
V due to the product of the
pin resistance (RPIN) and the LTC1293 supply current. For
example, with VREF = 1.25V this will result in a gain error
change of –1.0LSB from the gain error measured with
VREF = 5V.
N
SNR
dB
=
–.
.
176
602
Figure 15. Parasitic Pin Resistance (RPIN)
LTC1293
REF+
RPIN
ICC
DAC
REF
VREF
AGND
LTC1293 F15
± REFERENCE
VOLTAGE
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