参数资料
| 型号： | LTC1393IGN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/12页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER DUAL 4X1 16SSOP |
| 标准包装： | 100 |
| 功能： | 多路复用器 |
| 电路： | 2 x 4:1 |
| 导通状态电阻： | 400 欧姆 |
| 电压电源： | 双电源 |
| 电压 - 电源，单路/双路(±)： | ±2.7 V ~ 5 V |
| 电流 - 电源： | 10µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SSOP |
| 包装： | 管件 |
9
LTC1380/LTC1393
APPLICATIONS INFORMATION
WU
U
Table 1. LTC1380/LTC1393 Address Selection
A1
A0
LTC1380
LTC1393
0
90H
98H
0
1
92H
9AH
1
0
94H
9CH
1
96H
9EH
SCL is the synchronizing clock generated by the host. SDA
is the bidirectional data transfer between the host and the
slave. The host initiates a start bit by dropping the SDA line
from High to Low while the SCL is High. The stop bit is
initiated by changing the SDA line from Low to High while
SCL is High. All address, command and acknowledge
signals must be valid and should not change while SCL is
High. The acknowledge bit signals to the host the accep-
tance of a correct address byte or the command byte.
At VCC supply above 2.7V, the SCL and SDA input thresh-
old is typically 1V with an input hysteresis of 100mV. The
typical SCL and SDA lines have either a resistive or current
source pull-up at the host. The LTC1380/LTC1393 have an
open-drain NMOS transistor at the SDA pin to sink 3mA
below 0.4V during the slave acknowledge sequence. The
address selection input A1 and A0 are TTL compatible at
VCC = 5V.
Both the LTC1380 and LTC1393 are compatible with the
Philips/Signetics I2C Bus interface. This 1V threshold for
SCA and SDA should not pose an operational problem
with I2C applications.
The multiplexer switches are selected as shown in Table 2.
Both the LTC1380 and the LTC1393 have an enable bit
(EN). A Low disables all switches while a High enables the
selected switch as programmed by bits C2, C1 and C0. A
stop bit after a successful send byte sequence for LTC1380/
LTC1393 will disable all switches before the new selected
switch is connected.
Table 2. Multiplexer Control Bits Truth Table
LTC1380 DO
LTC1393 DO
+, DO–
EN
C2
C1
C0
CHANNEL STATUS
0XXX
All Off
1000
S0
S0+, S0–
1001
S1
1010
S2
S1+, S1–
1011
S3
1100
S4
S2+, S2–
1101
S5
1110
S6
S3+, S3–
1111
S7
TYPICAL APPLICATIONS
U
Simplified LTC1393 Application
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1393
0.1
F
15k
4 DIFFERENTIAL
ANALOG INPUTS
15k
5V
DIFFERENTIAL
ANALOG OUTPUTS
1380/93 TA03
S0+
S0 –
S1+
S1–
S2+
S2–
S3+
S3–
VCC
SCL
SDA
A0
A1
GND
DO
–
DO
+
SMBus
HOST
SCL
SDA
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