参数资料
型号: LTC1401CS8
厂商: Linear Technology
文件页数: 2/20页
文件大小: 0K
描述: IC A/D CONV 12BIT W/SHTDN 8-SOIC
标准包装: 100
位数: 12
采样率(每秒): 200k
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
功率耗散(最大): 30mW
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
输入数目和类型: 1 个单端,单极
10
LTC1401
1401fa
APPLICATIONS INFORMATION
WU
U
is available at Pin 3 to provide up to 1mA current to an
external load. For minimum code transition noise, the
reference output should be decoupled with a capacitor to
filter wideband noise from the reference (10
F tantalum in
parallel with a 0.1
F ceramic is recommended). The VREF
pin can be driven with a DAC or other means to provide
input span adjustment. The VREF pin must be driven to at
least 1.25V to prevent conflict with the internal reference.
The reference should not be driven to more than 3V.
Figure 6 shows an LT1360 op amp driving the reference
pin. Figure 7 shows a typical reference (LT1634-1.25)
connected to the LTC1401. This will provide improved
drift (equal to the maximum 25ppm/
°C of the LT1634-
1.25) and a 2.1338V full scale.
UNIPOLAR OPERATION AND ADJUSTMENT
Figure 8 shows the ideal input/output characteristics for
the LTC1401. The code transitions occur midway between
successive integer LSB values (i.e., 0.5LSB, 1.5LSB,
2.5LSB, ... FS – 1.5LSB ). The output code is straight
binary with 1LSB = 2.048V/4096 = 0.5mV.
Figure 7. Supplying a 2.5V Reference Voltage to
the LTC1401 with the LT1634-1.25
LTC1401 F06
+
VREF(OUT) ≥ 1.25V
AIN
VREF
GND
10
F
3
INPUT RANGE
1.707 VREF(OUT)
3V
LTC1401
LT1360
VCC
LTC1401 F07
10
F
3
INPUT RANGE 1.707 VREF
(= 2.1338V)
LT1634-1.25
10V
VIN
VOUT
GND
3V
AIN
VREF
GND
LTC1401
VCC
Figure 6. Driving the VREF with the LT1360 Op Amp
Figure 8. LTC1401 Unipolar Transfer Characteristics
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
FS – 1LSB
LTC1401 F08
111...111
111...110
111...101
111...100
000...000
000...001
000...010
000...011
1
LSB
UNIPOLAR
ZERO
1LSB = FS
4096
2.048
4096
=
Unipolar Offset and Full-Scale Error Adjustments
In applications where absolute accuracy is important, the
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 9a
shows the extra components required for full scale error
adjustment. If both offset and full-scale adjustments are
needed, the circuit in Figure 9b can be used. For zero offset
error, apply 0.25mV (i.e., 0.5LSB) at the input and adjust
the offset trim until the LTC1401 output code flickers
between 0000 0000 0000 and 0000 0000 0001. For zero
full-scale error, apply an analog input of 2.04725V ( FS –
1.5LSB or last code transition ) at the input and adjust R5
until the LTC1401 output code flickers between 1111 1111
1110 and 1111 1111 1111.
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