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参数资料
| 型号： | LTC1409ISW#TR |
| 厂商： | Linear Technology |
| 文件页数： | 4/20页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 800KSPS SMPL 28SOIC |
| 标准包装： | 1,000 |
| 位数： | 12 |
| 采样率（每秒）： | 800k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 120mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，双极；1 个差分，双极 |
12
LTC1409
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
is required. Figure 7b shows a simple implementation using
a LTC1560 5th order elliptic continuous time filter.
Input Range
The
±2.5V input range of the LTC1409 is optimized for low
noise and low distortion. Most op amps also perform best
over this same range, allowing direct coupling to the
analog inputs and eliminating the need for special transla-
tion circuitry.
Some applications may require other input ranges. The
LTC1409 differential inputs and reference circuitry can ac-
commodate other input ranges often with little or no addi-
tional circuitry. The following sections describe the reference
and input circuitry and how they affect the input range.
Internal Reference
The LTC1409 has an on-chip, temperature compensated,
curvature corrected, bandgap reference that is factory
trimmed to 2.500V. It is connected internally to a reference
amplifier and is available at VREF (Pin 3) see Figure 8a. A
4k resistor is in series with the output so that it can be
easily overdriven by an external reference or other cir-
cuitry. The reference amplifier gains the voltage at the VREF
pin by 1.625 to create the required internal reference
voltage. This provides buffering between the VREF pin and
the high speed capacitive DAC. The reference amplifier
compensation pin, REFCOMP (Pin 4), must be bypassed
with a capacitor to ground. The reference amplifier is
stable with capacitors of 1
F or greater. For the best noise
performance, a 10
F ceramic or 10F tantalum in parallel
with 0.1
F ceramic is recommended (see Figure 8b).
LTC1409
+AIN
ANALOG INPUT
5V
–AIN
VREF
REFCOMP
AGND
LTC1409 F08b
1
2
3
4
5
10
F
VIN
VOUT
LT1019A-2.5
Figure 8b. Using the LT1019-2.5 as an External Reference
The VREF pin can be driven with a DAC or other means
shown in Figure 9. This is useful in applications where the
peak input signal amplitude may vary. The input span of
the ADC can then be adjusted to match the peak input
signal, maximizing the signal-to-noise ratio. The filtering
of the internal LTC1409 reference amplifier will limit the
bandwidth and settling time of this circuit. A settling time
of 5ms should be allowed for, after a reference adjust-
ment.
R2
40k
R3
64k
REFERENCE
AMP
10
F
REFCOMP
AGND
VREF
R1
4k
BANGAP
REFERENCE
3
4
5
2.5V
4.0625V
LTC1409
LTC1409 F08a
Figure 8a. LTC1409 Reference Circuit
LTC1409
+AIN
ANALOG INPUT
–AIN
VREF
REFCOMP
AGND
LTC1409 F09
1
2
3
4
5
10
F
LTC1450
12-BIT
RAIL-TO-RAIL DAC
1.25V TO 3V
Figure 9.Driving VREF with a DAC
Differential Inputs
The LTC1409 has a unique differential sample-and-hold
circuit that allows rail-to-rail inputs. The ADC will always
convert the difference of +AIN – (–AIN) independent of the
common mode voltage. The common mode rejection
holds up to extremely high frequencies, see Figure 10a.
The only requirement is that both inputs can not exceed
the AVDD or AVSS power supply voltages. Integral
nonlinearity errors (INL) and differential nonlinearity er-
rors (DNL) are independent of the common mode voltage,
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