参数资料
| 型号： | LTC1434CGN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 3.3V/5V/ADJ 20SSOP |
| 标准包装： | 55 |
| 类型： | 降压（降压） |
| 输出类型： | 两者兼有 |
| 输出数： | 1 |
| 输出电压： | 3.3V，5V，可调 |
| 输入电压： | 3 V ~ 13.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 最高 700kHz |
| 电流 - 输出： | 450mA |
| 同步整流器： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 供应商设备封装： | 20-SSOP |
LTC1433/LTC1434
APPLICATIO N S I N FOR M ATIO N
stable input to the voltage controlled oscillator. The filter
1.3f O
f O
0.7f O
components C LP and R LP determine how fast the loop
acquires lock. Typically R LP = 10k and C LP is 0.01 μ F to
0.1 μ F. Be sure to connect the low side of the filter to SGND.
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 11 will
provide a frequency shift from f O to 1.9f O as the voltage
V PLL LPF increases from 0V to 2.4V. Do not exceed 2.4V on
V PLL LPF .
0
0.5
1.0
1.5
2.0
2.5
V PLLLPF (V)
3.3V OR 5V
1433/34 F09
Figure 9. Relationship Between Oscillator Frequency
PLL LPF
2.4V MAX
and Voltage at PLL LPF Pin
EXTERNAL
FREQUENCY
R LP
18k
1433/34 F11
PHASE
2.4V
C LP
C OSC
Figure 11. Directly Driving PLL LPF Pin
DETECTOR
Low-Battery Comparator
PLLIN
DIGITAL
PLL LPF
C OSC
The LTC1433/LTC1434 have an on-chip, low-battery com-
parator which can be used to sense a low-battery condi-
V LBTRIP = 1 . 19 ?
+ 1 ?
50k
PHASE/
FREQUENCY
DETECTOR
OSC
tion when implemented as shown in Figure 12. The resis-
tor divider R3/R4 sets the comparator trip point as follows:
? R 4
?
? R 3
?
1433/34 F10
Figure 10. Phase-Locked Loop Block Diagram
V IN
R4
LTC1433/LTC1434
If the external frequency (V PLLIN ) is greater than the center
frequency f 0 , current is sourced continuously, pulling up
the PLL LPF pin. When the external frequency is less than
f 0 , current is sunk continuously, pulling down the PLL LPF
R3
–
+
1.19V REFERENCE
1433/34 F12
pin. If the external and internal frequencies are the same
but exhibit a phase difference, the current sources turn on
for an amount of time corresponding to the phase differ-
ence. Thus the voltage on the PLL LPF pin is adjusted until
the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
C LP holds the voltage.
The loop filter components C LP and R LP smooth out the
current pulses from the phase detector and provide a
12
Figure 12. Low-Battery Comparator
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
40mV hysteresis is built in to assure rapid switching. The
output is an open-drain MOSFET and requires a pull-up
resistor to operate. This comparator is active in shutdown.
To save more shutdown quiescent current, this compara-
tor can be shut down by taking the LBI pin below 0.74V,
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