参数资料
型号: LTC1516IS8
厂商: Linear Technology
文件页数: 5/8页
文件大小: 0K
描述: IC REG SWITCHED CAP DBL 5V 8SOIC
标准包装: 100
类型: 切换式电容器(充电泵),倍增器
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 2 V ~ 5 V
频率 - 开关: 600kHz
电流 - 输出: 50mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 8-SOIC
LTC1516
APPLICATIO N S I N FOR M ATIO N
Short-Circuit/Thermal Protection
During short-circuit conditions, the LTC1516 will draw
between 200mA and 400mA from V IN causing a rise in
the junction temperature. On-chip thermal shutdown
circuitry disables the charge pump once the junction
temperature exceeds 135 ° C, and reenables the charge
pump once the junction temperature falls back to 115 ° C.
The LTC1516 will cycle in and out of thermal shutdown
indefinitely without latchup or damage until the V OUT short
is removed.
Capacitor Selection
For best performance, it is recommended that low ESR
capacitors be used for both C IN and C OUT to reduce noise
and ripple. The C IN and C OUT capacitors should be either
ceramic or tantalum and should be 10 μ F or greater. If the
input source impedance is very low, C IN may not be
needed. Increasing the size of C OUT to 22 μ F or greater will
reduce output voltage ripple.
Ceramic or tantalum capacitors are recommended for the
flying caps C1 and C2 with values in the range of 0.1 μ F to
1 μ F. Note that large value flying caps (> 0.22 μ F) will
increase output ripple unless C OUT is also increased. For
higher ripple due to higher output voltage dV/dt. High ESR
capacitors (ESR > 0.5 ? ) on the output pin cause high
frequency voltage spikes on V OUT with every clock cycle.
There are several ways to reduce the output voltage ripple.
A larger C OUT capacitor (22 μ F or greater) will reduce both
the low and high frequency ripple due to the lower C OUT
charging and discharging dV/dt and the lower ESR typi-
cally found with higher value (larger case size) capacitors.
A low ESR ceramic output capacitor will minimize the high
frequency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is chosen. A reason-
able compromise is to use a 10 μ F to 22 μ F tantalum
capacitor in parallel with a 1 μ F to 3.3 μ F ceramic capacitor
on V OUT to reduce both the low and high frequency ripple.
An RC filter may also be used to reduce high frequency
voltage spikes (see Figure 2).
In low load or high V IN applications, smaller values for C1
and C2 may be used to reduce output ripple. The smaller
C1 and C2 flying capacitors (0.022 μ F to 0.1 μ F) deliver less
charge per clock cycle to the output capacitor resulting in
lower output ripple. However, the smaller value flying caps
also reduce the maximum I OUT capability as well as
efficiency.
very low load applications, C1 and C2 may be reduced to
0.01 μ F to 0.047 μ F. This will reduce output ripple at the
expense of efficiency and maximum output current.
LTC1516
V OUT
3
+
15 μ F
1 μ F
V OUT
5V
Output Ripple
TANTALUM
CERAMIC
Normal LTC1516 operation produces voltage ripple on the
V OUT pin. Output voltage ripple is required for the LTC1516
to regulate. Low frequency ripple exists due to the hyster-
LTC1516
V OUT
3
+
10 μ F
2 ?
+
10 μ F
V OUT
5V
esis in the sense comparator and propagation delays in the
charge pump enable/disable circuits. High frequency ripple
is also present mainly due to ESR (Equivalent Series
Resistance) in the output capacitor. Typical output ripple
under maximum load is 100mV P-P with a low ESR 10 μ F
output capacitor.
The magnitude of the ripple voltage depends on several
factors. High input voltages (V IN > 3.3V) increase the output
ripple since more charge is delivered to C OUT per clock
cycle. Large C1 and C2 flying capacitors (> 0.22 μ F) also
increase ripple for the same reason. Large output current
load and/or a small output capacitor (< 10 μ F) results in
1516 F02
Figure 2. Output Ripple Reduction Techniques
Inrush Currents
During normal operation, V IN will experience current tran-
sients in the 100mA to 200mA range whenever the charge
pump is enabled. During start-up, these inrush currents
may approach 500mA. For this reason, it is important to
minimize the source resistance between the input supply
and the V IN pin to prevent start-up problems and large
input voltage transients.
5
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