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参数资料
| 型号： | LTC1530CS8-2.8 |
| 厂商： | Linear Technology |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | IC SW REG CNTRLR SYNC 2.8V 8SOIC |
| 标准包装： | 100 |
| 应用： | 控制器，Intel Pentium? II，AMD-K6?-2 |
| 输入电压： | 3.75 V ~ 13.2 V |
| 输出数： | 1 |
| 输出电压： | 2.8V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
LTC1530
APPLICATIO S I FOR ATIO
f LC =
1
2 π L O ( C OUT
)
LTC1530
V OUT
3
f ESR =
( 2 π )( ESR )( C OUT )
The ESR of the output capacitor and the output capacitor
value form a zero at the frequency:
1
R C
C C
COMP
4
C1
–
ERR
+
BG
1530 F08a
The compensation network used with the error amplifier
must provide enough phase margin at the 0dB crossover
frequency for the overall open-loop transfer function. The
zero and pole from the compensation network are:
Figure 8a. Compensation Pin Hook-Up
f SW = LTC1530 SWITCHING FREQUENCY
f CO = CLOSED-LOOP CROSSOVER FREQUENCY
( )( R C )( C C )
( )( R C )( ) 1 C
f Z =
2 π
1
and f P =
2 π
1
f Z
–20dB/DECADE
respectively. Figure 8b shows the Bode plot of the overall
transfer function.
f P
The compensation values used in this design are based on
f LC
f ESR
f CO
FREQUENCY
the following criteria, f SW = 12f CO , f Z = f LC , f P = 5f CO . At the
closed-loop frequency f CO , the attenuation due to the LC
filter and the input resistor divider is compensated by the
gain of the PWM modulator and the gain of the error
amplifier (g mERR )(R C ).
Although a mathematical approach to frequency compen-
sation can be used, the added complication of input and/
1530 F08b
Figure 8b. Bode Plot of the LTC1530 Overall
Transfer Function
Table 2. Suggested Compensation Network for a 5V Input
Application Using Multiple Paralleled 330 μ F AVX TPS Output
Capacitors for 2.5V Output
or output filters, unknown capacitor ESR, and gross
operating point changes with input voltage, load current
variations and frequency of operation all suggest a more
practical empirical method. This can be done by injecting
a transient current at the load and using an RC network box
to iterate toward the final compensation values or by
obtaining the optimum loop response using a network
analyzer to find the actual loop poles and zeros.
Table 2 shows the suggested compensation components
for 5V input applications based on the inductor and output
L O ( μ H)
1
1
1
2.7
2.7
2.7
5.6
5.6
5.6
C O ( μ F)
990
1980
4950
990
1980
4950
990
1980
4950
R C (k ? )
1.3
2.7
6.8
3.6
7.5
18
7.5
15
36
C C ( μ F)
0.022
0.022
0.01
0.022
0.01
0.01
0.01
0.01
0.0047
C1 (pF)
1000
470
220
330
220
68
220
100
47
capacitor values. The values were calculated using mul-
tiple paralleled 330 μ F AVX TPS series surface mount
tantalum capacitors for the output capacitor. The opti-
mum component values might deviate from the suggested
values slightly because of board layout and operating
condition differences.
An alternate output capacitor is the Sanyo MV-GX series.
Using multiple paralleled 1500 μ F Sanyo MV-GX capaci-
tors for the output capacitor, Table 3 shows the suggested
compensation components for 5V input applications based
on the inductor and output capacitor values.
1530fa
15
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