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参数资料
| 型号： | LTC1530CS8-3.3#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | IC SW REG CNTRLR SYNC 3.3V 8SOIC |
| 标准包装： | 100 |
| 应用： | 控制器，Intel Pentium? II，AMD-K6?-2 |
| 输入电压： | 3.75 V ~ 13.2 V |
| 输出数： | 1 |
| 输出电压： | 3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
LTC1530
APPLICATIO S I FOR ATIO
In order for the current limit circuit to operate properly and
to obtain a reasonably accurate current limit threshold, the
I MAX and I FB pins must be Kelvin sensed at Q1’s drain and
source pins. A 0.1 μ F decoupling capacitor can also be
connected across R IMAX to filter switching noise. In addi-
tion, LTC recommends that the voltage drop across the
R IMAX resistor be set to ≥ 100mV. Otherwise, noise spikes
or ringing at Q1’s source can cause the actual current limit
to be greater than the desired current limit set point.
MOSFET Gate Drive
The PV CC supply must be greater than the input supply
voltage, V IN , by at least one power MOSFET V GS(ON) for
efficient operation. This higher voltage can be supplied
with a separate supply, or it can be generated using a
simple charge pump as shown in Figure 7. The 86%
maximum duty cycle ensures sufficient off-time to refresh
the charge pump during each cycle.
As PV CC is powered up from 0V, the LTC1530 undervolt-
age lockout circuit prevents G1 and G2 from pulling high
until PV CC reaches about 3.5V. To prevent Q1’s high
R DS(ON) from triggering the current limit comparator while
PV CC is slewing, the current limit circuit is disabled until
PV CC is ≥ 8V. In addition, on start-up or recovery from
thermal shutdown, the driver logic is designed to hold G2
low until G1 first goes high.
Power MOSFETs
Two N-channel power MOSFETs are required for synchro-
nous LTC1530 circuits. They should be selected based
primarily on threshold voltage and on-resistance consid-
erations. Thermal dissipation is often a secondary con-
cern in high efficiency designs. The required MOSFET
threshold should be determined based on the available
power supply voltages and/or the complexity of the gate
drive charge pump scheme. In 5V input designs where a
12V supply is used to power PV CC , standard MOSFETs
with R DS(ON) specified at V GS = 5V or 6V can be used with
good results. The current drawn from the 12V supply
varies with the MOSFETs used and the LTC1530’s operat-
ing frequency, but is generally less than 50mA.
LTC1530 applications that use a 5V V IN voltage and a
doubling charge pump to generate PV CC do not provide
enough gate drive voltage to fully enhance standard
power MOSFETs. Under this condition, the effective
MOSFET R DS(ON) may be quite high, raising the dissipa-
tion in the FETs and reducing efficiency. In addition,
power supply start-up problems can occur with standard
power MOSFETs. These start-up problems can occur for
two reasons. First, if the MOSFET is not fully enhanced,
the higher effective R DS(ON) causes the LTC1530 to acti-
vate current limit at a much lower level than the desired
trip point. Second, standard MOSFETs have higher GATE
threshold voltages than logic level MOSFETs, thereby
increasing the PV CC voltage required to turn them on. A
+
OPTIONAL FOR
V IN > 6.5V
13V
1N5243B
10 μ F
MBR0530T1 MBR0530T1 V IN
PV CC 0.22 μ F
+
C IN
MOSFET whose R DS(ON) is rated at V GS = 4.5V does not
necessarily have a logic level MOSFET GATE threshold
voltage. Logic level FETs are the recommended choice for
5V-only systems. Logic level FETs can be fully enhanced
with a doubler charge pump and will operate at maximum
G1
efficiency. Note that doubler charge pump designs run-
G2
Q1
Q2
L O
+
V OUT
C O
ning from supplies higher than 6.5V should include a
Zener diode clamp at PV CC to prevent transients from
exceeding the absolute maximum rating of the pin.
LTC1530
Figure 7. Doubling Charge Pump
1530 F07
After the MOSFET threshold voltage is selected, choose
the R DS(ON) based on the input voltage, the output voltage,
allowable power dissipation and maximum output cur-
rent. In a typical LTC1530 buck converter circuit, operat-
ing in continuous mode, the average inductor current is
equal to the output load current. This current flows through
1530fa
11
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| LTC1530IS8 | 功能描述:IC SW REG CNTRLR SYNC ADJ 8-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC1530IS8#PBF | 功能描述:IC SW REG CNTRLR SYNC ADJ 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC1530IS8#TR | 功能描述:IC SW REG CTRLR SYNC HIPWR 8SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC1530IS8#TRPBF | 功能描述:IC SW REG CNTRLR SYNC ADJ 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC1530IS8-1.9 | 功能描述:IC SW REG CNTRLR SYNC 1.9V 8SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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