参数资料
型号: LTC1530CS8-3.3
厂商: Linear Technology
文件页数: 12/24页
文件大小: 0K
描述: IC SW REG CNTRLR SYNC 3.3V 8SOIC
标准包装: 100
应用: 控制器,Intel Pentium? II,AMD-K6?-2
输入电压: 3.75 V ~ 13.2 V
输出数: 1
输出电压: 3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
LTC1530
APPLICATIO S I FOR ATIO
either Q1 or Q2 with the power dissipation split up accord-
ing to the duty cycle:
Note that while the required R DS(ON) values suggest large
MOSFETs, the power dissipation numbers are only 1.39W
per device or less — large TO-220 packages and heat
DC ( Q 1 ) = OUT
DC ( Q 2 ) = 1 ? =
V
V IN
V OUT
V IN
(
V IN ? V OUT
V IN
)
sinks are not necessarily required in high efficiency appli-
cations. Siliconix Si4410DY or International Rectifier
IRF7413 (both in SO-8) or Siliconix SUD50N03 or Motorola
MTD20N03HDL (both in DPAK) are small footprint sur-
face mount devices with R DS(ON) values below 0.03 ? at 5V
The R DS(ON) required for a given conduction loss can now
be calculated by rearranging the relation P = I 2 R.
of V GS that work well in LTC1530 circuits. With higher
output voltages, the R DS(ON) of Q1 may need to be signifi-
cantly lower than that for Q2. These conditions can often
be met by paralleling two MOSFETs for Q1 and using a
[ ] ) 1 ( I MAX 2 )
( V OUT ) ( )
[ ] ) 2 ( I MAX 2 )
( V IN OUT ) ( I MAX 2 )
R DS ( ON ) Q 1 =
=
R DS ( ON ) Q 2 =
=
P MAX ( Q 1 )
DC ( Q
( V IN ) [ P MAX ( Q 1 ) ]
I MAX 2
P MAX ( Q 2 )
DC ( Q
( V IN ) [ P MAX ( Q 2 ) ]
? V
single device for Q2. Using a higher P MAX value in the
R DS(ON) calculations generally decreases the MOSFET
cost and the circuit efficiency and increases the MOSFET
heat sink requirements.
In most LTC1530 applications, R DS(ON) is used as the
current sensing element. MOSFET R DS(ON) has a positive
temperature coefficient. Therefore, the LTC1530 I MAX sink
current is designed with a positive 3300ppm/ ° C tempera-
ture coefficient. The positive tempco of I MAX provides first
order correction for current limit vs temperature. There-
fore, current limit does not have to be set to an increased
level at room temperature to guarantee a desired output
current at elevated temperatures.
P MAX should be calculated based primarily on required
efficiency or allowable thermal dissipation. A high efficiency
buck converter designed for the Pentium II with 5V input
and a 2.8V, 11.2A output might allow no more than 4%
efficiency loss at full load for each MOSFET. Assuming
roughly 90% efficiency at this current level, this gives a P MAX
value of:
(2.8)(11.2A/0.9)(0.04) = 1.39W per FET
and a required R DS(ON) of:
Table 1 highlights a variety of power MOSFETs that are
suitable for use in LTC1530 applications.
Inductor Selection
The inductor is often the largest component in an LTC1530
design and must be chosen carefully. Choose the inductor
value and type based on output slew rate requirements
and expected peak current. The required output slew rate
primarily controls the inductor value. The maximum rate
of rise of inductor current is set by the inductor’s value, the
2 . 8 V ? 11 . 2 A 2 ?
DC MAX ? IN OUT ? =
R DS ( ON ) Q 1 =
R DS ( ON ) Q 2 =
? ?
( 5 V ? 2 . 8 V ) ? 11 . 2 A 2 ?
5 V ( 1 . 39 W ) = 0 . 020 ?
? ?
5 V ( 1 . 39 W ) = 0 . 025 ?
input-to-output voltage differential and the LTC1530’s
maximum duty cycle. In a typical 5V input, 2.8V output
application, the maximum rise time will be:
? V ? V ? 1 . 85 A
? L ? L μ s
1530fa
12
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