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| 型号： | LTC1536CS8 |
| 厂商： | Linear Technology |
| 文件页数： | 3/12页 |
| 文件大小： | 0K |
| 描述： | IC PREC TRPL SPPLY MONITOR 8SOIC |
| 标准包装： | 100 |
| 类型： | 多压监控器 |
| 监视电压数目： | 3 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 2.985V，4.725V，可调 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
LTC1536
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25 ° C. V CC3 = 3.3V, V CC5 = 5V, V CCA = V CC3 unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I PBR
PBR Pull-Up Current
PBR = 0V, 0 ° C ≤ T A ≤ 70 ° C
PBR = 0V, – 40 ° C ≤ T A ≤ 85 ° C
●
●
3
3
7
7
10
15
μ A
μ A
V IL
V IH
t PW
PBR, RST Input Low Voltage
PBR, RST Input High Voltage
PBR Min Pulse Width
●
●
●
2
40
0.8
V
V
ns
t DB
PBR Debounce
Deassertion of PBR Input to SRST
Output (PBR Pulse Width = 1 μ s)
●
20
35
ms
t PB
V OL
PBR Assertion Time for Transition
from Soft to Hard Reset Mode
RST Output Voltage Low
PBR Held Less Than V IL , 0 ° C to 70 ° C
PBR Held Less Than V IL , – 40 ° C to 85 ° C
I SINK = 5mA
I SINK = 100 μ A
V CC3 = 1V, V CC5 = 0V
0 ° C ≤ T A ≤ 70 ° C
V CC3 = 0V, V CC5 = 1V
●
●
●
●
●
1.4
1.4
2.0
2.0
0.15
0.05
0.05
2.8
3.0
0.4
0.4
0.4
s
s
V
V
V
V CC3 = 1V, V CC5 = 1V
●
0.05
0.4
V
I SINK = 100 μ A
– 40 ° C ≤ T A ≤ 85 ° C
V CC3 = 1.1V, V CC5 = 0V
V CC3 = 0V, V CC5 = 1.1V
V CC3 = 1.1V, V CC5 = 1.1V
●
●
●
0.05
0.05
0.05
0.4
0.4
0.4
V
V
V
SRST Output Voltage Low
RST Output Voltage Low
I SINK = 2.5mA
I SINK = 2.5mA
●
●
0.15
0.15
0.4
0.4
V
V
V OH
t PHL
RST Output Voltage High (Note 3)
SRST Output Voltage High (Note 3)
RST Output Voltage High
Propagation Delay RST to RST
I SOURCE = 1 μ A
I SOURCE = 1 μ A
I SOURCE = 600 μ A
C RST = 20pF
●
●
●
V CC3 – 1
V CC3 – 1
V CC3 – 1
25
V
V
V
ns
High Input to Low Output
t PLH
Propagation Delay RST to RST
C RST = 20pF
45
ns
Low Input to High Output
t FAIL
V CC5 or V CC3 0.5V Undervoltage
V CC5 Drops Below 4.25V or V CC3 Drops
●
150
450
ns
to RST (Note 4)
Below 2.5V (Note 5)
t PF
V CC5 < (V CC3 – 300mV) RST (Note 4)
V CC5 Drops Below V CC3 By 300mV
●
50
90
ns
(Note 6)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: The output pins SRST and RST have weak internal pull-ups to
V CC3 of 6 μ A. However, external pull-up resistors may be used when faster
Note 4: Conforms to PCI Local Bus Specification Rev 2.1,
Sect. 4.3.2 for t FAIL .
Note 5: V CC3 or V CC5 falling at – 0.1V/ μ s, time measured from
V RTX – 500mV to RST at 1.5V.
Note 6: V CC5 falling from 5V to 3V in ≤ 10ns, time measured from
V CC5 = (V CC3 – 300mV) to RST at 1.5V.
rise times are required.
1536fa
3
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