参数资料
型号: LTC1594LIS
厂商: Linear Technology
文件页数: 7/24页
文件大小: 0K
描述: IC A/D CONV 12BIT SRL 4CH 16SOIC
标准包装: 50
位数: 12
采样率(每秒): 10.5k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 1.6mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 管件
输入数目和类型: 8 个单端,单极
15
LTC1594L/LTC1598L
15948lfb
APPLICATIONS INFORMATION
WU
U
BOARD LAYOUT CONSIDERATIONS
Grounding and Bypassing
The LTC1594L/LTC1598L are easy to use if some care is
taken. They should be used with an analog ground plane
and single point grounding techniques. The GND pin
should be tied directly to the ground plane.
The VCC pin should be bypassed to the ground plane with
a 10
Ftantalumcapacitorwithleadsasshortaspossible.
If the power supply is clean, the LTC1594L/LTC1598L
can also operate with smaller 1
F or less surface mount
or ceramic bypass capacitors. All analog inputs should
be referenced directly to the single point ground. Digital
inputs and outputs should be shielded from and/or
routed away from the reference and analog circuitry.
SAMPLE-AND-HOLD
Both the LTC1594L/LTC1598L provide a built-in sample-
and-hold (S&H) function to acquire signals through the
selected channel, assuming the ADCIN and MUXOUT
pins are tied together. The S & H of these parts acquire
input signals through the selected channel relative to
COM input during the tSMPL time (see Figure 7).
Single-Ended Inputs
The sample-and-hold of the LTC1594L/LTC1598L allows
conversion of rapidly varying signals. The input voltage
is sampled during the tSMPL time as shown in Figure 7.
The sampling interval begins after tON time once the CS
is pulled low and continues until the second falling CLK
edge after the CS is low (see Figure 7). On this falling CLK
Figure 7. LTC1594L/LTC1598L ADCIN and COM Input Settling Windows
CLK
DIN
DOUT
MUXOUT = ADCIN
CH0 TO CH7
SAMPLE
HOLD
“ANALOG” INPUT MUST
SETTLE DURING
THIS TIME
tSMPL
tON
tCONV
CSADC = CSMUX = CS
D2
D1
EN
D0
DON‘T CARE
1ST BIT TEST “COM” INPUT MUST
SETTLE DURING THIS TIME
B11
COM
1594L/98L F07
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