参数资料
型号: LTC1629IG#PBF
厂商: Linear Technology
文件页数: 8/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 47
系列: PolyPhase®
PWM 型: 电流模式
输出数: 1
频率 - 最大: 360kHz
占空比: 99.5%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 管件
产品目录页面: 1333 (CN2011-ZH PDF)
LTC1629/LTC1629-PG
PI FU CTIO S
PLLIN (Pin 6): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50k ? . The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
PHASMD (Pin 7): Control Input to Phase Selector which
determines the phase relationships between controller 1,
controller 2 and the CLKOUT signal.
I TH (Pin 8): Error Amplifier Output and Switching Regula-
tor Compensation Point. Both current comparator’s thresh-
olds increase with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V.
SGND (Pin 9): Signal Ground, common to both control-
lers, must be routed separately from the input switched
current ground path to the common (–) terminal(s) of the
C OUT capacitor(s).
V DIFFOUT (Pin 10): Output of a Differential Amplifier that
provides true remote output voltage sensing. This pin
normally drives an external resistive divider that sets the
output voltage.
V OS– , V OS+ (Pins 11, 12): Inputs to an Operational Ampli-
fier. Internal precision resistors capable of being elec-
tronically switched in or out can configure it as a differen-
tial amplifier or an uncommitted Op Amp.
AMPMD (Pin 15) (LTC1629 Only): This Logic Input pin
controls the connections of internal precision resistors
that configure the operational amplifier as a unity-gain
differential amplifier.
PGOOD (Pin 15) (LTC1629-PG Only): Open-Drain Logic
Output. PGOOD is pulled to ground when the voltage on
the EAIN pin is not within ± 7.5% of its set point.
TG2, TG1 (Pins 16, 27): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTV CC superim-
posed on the switch node voltage SW.
8
SW2, SW1 (Pins 17, 26): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V IN .
BOOST2, BOOST1 (Pins 18, 25): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the Boost and Switch pins and Schottky diodes
are tied between the Boost and INTV CC pins. Voltage swing
at the Boost pins is from INTV CC to (V IN + INTV CC ).
BG2, BG1 (Pins 19, 23): High Current Gate Drives for
Bottom Synchronous N-Channel MOSFETS. Voltage swing
at these pins is from ground to INTV CC .
PGND (Pin 20): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of
C IN .
INTV CC (Pin 21): Output of the Internal 5V Linear Low
Dropout Regulator and the EXTV CC Switch. The driver and
control circuits are powered from this voltage source.
Decouple to power ground with a 1 μ F ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7 μ F
additional tantalum or other low ESR capacitor.
EXTV CC (Pin 22): External Power Input to an Internal
Switch . This switch closes and supplies INTV CC, bypass-
ing the internal low dropout regulator whenever EXTV CC is
higher than 4.7V. See EXTV CC Connection in the Applica-
tions Information section. Do not exceed 7V on this pin
and ensure V EXTVCC ≤ V INTVCC .
V IN (Pin 24): Main Supply Pin. Should be closely decoupled
to the IC’s signal ground pin.
CLKOUT (Pin 28): Output Clock Signal available to
daisychain other controller ICs for additional MOSFET
driver stages/phases.
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