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| 型号： | LTC1644CGN#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/24页 |
| 文件大小： | 447K |
| 描述： | IC CONTROLLER HOT SWAP 20-SSOP |
| 标准包装： | 55 |
| 类型： | 热交换控制器 |
| 应用： | CompactPCI? |
| 内部开关： | 无 |
| 电源电压： | 3.3V，5V，±12V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 1341 (CN2011-ZH PDF) |
LTC1644
17
1644f
Output Voltage Monitor
The status of all four output voltages is monitored by the
power good function. In addition, the PCI_RST# signal is
logically combined on-chip with the HEALTHY# signal to
create LOCAL_PCI_RST# (see Table 5). As a result,
LOCAL_PCI_RST# will be pulled low whenever HEALTHY#
is pulled high independent of the state of the PCI_RST#
signal.
Table 5. LOCAL_PCI_RST# Truth Table
PCI_RST#
HEALTHY#
LOCAL_PCI_RST#
LO
LO
LO
LO
HI
LO
HI
LO
HI
HI
HI
LO
If any of the output voltages drop below the power good
threshold for more than 10祍, the PWRGD pin will be
pulled high and the LOCAL_PCI_RST# signal will be
asserted low.
Precharge
The PRECHARGE input and DRIVE output pins are in-
tended for use in generating the 1V precharge voltage that
is used to bias the bus I/O connector pins during board
insertion. The LTC1644 is also capable of generating
precharge voltages other than 1V. Figure 8 shows a circuit
that can be used in applications requiring a precharge
voltage less than 1V. The circuit in Figure 9 can be used for
applications that need precharge voltages greater than 1V.
Table 6 lists suggested resistor values for R10A and R10B
vs precharge voltage for the application circuits shown in
Figures 8 and 9.
Table 6. R10A and R10B Resistor Values vs Precharge Voltage
V
PRECHARGE
R10A
R10B
V
PRECHARGE
R10A
R10B
1.5V
18&
9.09&
0.9V
16.2&
1.78&
1.4V
18&
7.15&
0.8V
14.7&
3.65&
1.3V
18&
5.36&
0.7V
12.1&
5.11&
1.2V
18&
3.65&
0.6V
11&
7.15&
1.1V
18&
1.78&
0.5V
9.09&
9.09&
1V
18&
0&
Due to leakage current constraints, precharge resistor
values of less than 50k are often required. In these
precharge applications, it may also be necessary to dis-
connect the individual resistors from the LTC1644s
PRECHARGE pin when the plug-in board is completely
seated in the board slot. The circuit in Figure 10 uses a bus
switch to connect the individual precharge resistors to the
LTC1644s PRECHARGE pin while the BD_SEL# pin volt-
age is pulled up to 5V
IN
, i.e., when the BD_SEL# short
connector pin is still unconnected. After the plug-in board
is completely seated, the BD_SEL# pin voltage will drop to
approximately 3.8V (assuming BD_SEL# isnt asserted
low), and the bus switch OE pin is pulled high by Q2. When
the plug-in card is removed from the connector, the
BD_SEL# connection is broken first and the BD_SEL# pin
voltage pulls up to 5V. This causes Q2 to turn off, which re-
enables the bus switch and the precharge resistors are
reconnected to the LTC1644s PRECHARGE pin for the
remainder of the board extraction process.
Other CompactPCI Applications
The LTC1644 can be easily configured for applications
where no V
EE
supply is present by simply connecting the
V
EEIN
pin to GND and floating the V
EEOUT
pin (Figure 11).
For CPCI applications where no 5V supply input is re-
quired, short both the 5V
IN
and 5V
SENSE
pins to the 3V
IN
pin and short the 5V
OUT
pin to the 3V
OUT
pin (Figure 12).
If no 3.3V supply input is required, Figure 13 illustrates
how the LTC1644 should be configured. First, 3V
SENSE
(Pin 16) is connected to 3V
IN
(Pin 17), 3V
OUT
(Pin 18) is
connected to 5V
OUT
(Pin 3) and the LTC1644s 3V
IN
pin is
connected through a pair of signal diodes (BAV99) to 5V
IN
.
For applications where the BD_SEL# connector pin is
typically grounded on the backplane, the circuit in
Figure 14 allows the LTC1644 to be reset simply by
pressing a pushbutton switch on the CPCI plugin board.
This arrangement eliminates the requirement to extract
and reinsert the CPCI board in order to reset the LTC1644s
circuit breakers.
Power MOSFET Selection Criteria
Three device parameters are key in selecting the optimal
power MOSFET for Hot Swap applications. The three
parameters are: (1) device power dissipation (P
D
); (2)
device drain-source channel ON resistance, R
DS(ON)
; and
APPLICATIO S I FOR ATIO
U
U
U
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