参数资料
型号: LTC1735CF#PBF
厂商: Linear Technology
文件页数: 24/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 20TSSOP
标准包装: 74
PWM 型: 电流模式
输出数: 1
频率 - 最大: 335kHz
占空比: 99.4%
电源电压: 4 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 85°C
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
包装: 管件
产品目录页面: 1333 (CN2011-ZH PDF)
LTC1735
APPLICATIO S I FOR ATIO
At full load current:
The Thevenin equivalent of the gain limiting resistance
V ITH ( MAX ) = ? ? 15 A + ?
? ? ?
? ? 5 A P ? P ?
= 1 . 77 V
At minimum load current:
2
?
? 0 . 084 V / A ? + 0 . 3 V
? ?
value of 17.54k is made up of a resistor R4 that sources
current into the I TH pin and resistor R1 that sinks current
to SGND.
To calculate the resistor values, first determine the ratio
between them:
V ITH ( MIN ) = ? ? 0 . 2 A +
?
?
k =
= = 3 . 79
? ?
? ? ?
= 0 . 40 V
2 A P ? P ?
2
?
? 0 . 084 V / A ? + 0 . 3 V
? ?
V INTVCC – V ITH ( NOM ) 5 . 2 V – 1 . 085 V
V ITH ( NOM ) 1 . 085 V
V INTVCC is equal to V EXTVCC or 5.2V if EXTV CC is not used.
Resistor R4 is:
In this circuit, V ITH changes from 0.40V at light load to
1.77V at full load, a 1.37V change. Notice that ? I L , the
peak-to-peak inductor current, changes from light load to
R 4 = ( k + 1 ) ? R ITH = ( 3 . 79 + 1 ) ? 17 . 54 = 84 . 0 k
Resistor R1 is:
full load. Increasing the DC inductor current decreases the
permeability of the inductor core material, which de-
creases the inductance and increases ? I L . The amount of
R 1 =
( k + 1 ) ? R ITH
k
=
( 3 . 79 + 1 ) ? 17 . 54 k
3 . 79
= 22 . 17 k
inductance change is a function of the inductor design.
To create the ± 30mV input offset, the gain of the error
amplifier must be limited. The desired gain is:
Unfortunately, PCB noise can add to the voltage developed
across the sense resistor, R5, causing the I TH pin voltage
to be slightly higher than calculated for a given output
= = 22 . 8
A V =
? V ITH
Input Offset Error
1 . 37 V
2 ( 0 . 03 V )
current. The amount of noise is proportional to the output
current level. This PCB noise does not present a serious
problem but it does change the effective value of R5 so the
Connecting a resistor to the output of the transconductance
error amplifier will limit the voltage gain. The value of this
resistor is:
calculated values of R1 and R4 may need to be adjusted to
achieve the required results. Since PCB noise is a function
of the layout, it will be the same on all boards with the same
= = 17 . 54 k
R ITH =
A V
Error Amplifier g m
22 . 8
1 . 3 mS
layout.
Figures 9 and 10 show the transient response before and
after active voltage positioning is implemented. Notice
To center the output voltage variation, V ITH must be
centered so that no I TH pin current flows when the output
voltage is nominal. V ITH(NOM) is the average voltage be-
tween V ITH at maximum output current and minimum
output current:
that active voltage positioning reduced the transient re-
sponse from almost 200mV P-P to a little over 100mV P-P .
Refer to Design Solutions 10 for more information about
active voltage positioning.
V ITH ( NOM ) =
V ITH ( MAX ) – V ITH ( MIN )
2
+ V ITH ( MIN )
= + 0 . 40 V = 1 . 085 V
1 . 77 V – 0 . 40 V
2
1735fc
24
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