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参数资料
| 型号： | LTC1746IFW#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 25MSPS LP 48TSSOP |
| 标准包装： | 1,800 |
| 位数： | 14 |
| 采样率（每秒）： | 25M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 465mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，双极；1 个差分，双极 |
11
LTC1746
1746f
CONVERTER OPERATION
As shown in Figure 1, the LTC1746 is a CMOS pipelined
multistep converter. The converter has four pipelined ADC
stages; a sampled analog input will result in a digitized
value five cycles later, see the Timing Diagram section.
The analog input is differential for improved common
mode noise immunity and to maximize the input range.
Additionally, the differential input drive will reduce even
order harmonics of the sample-and-hold circuit. The en-
code input is also differential for improved common mode
noise immunity.
The LTC1746 has two phases of operation, determined by
the state of the differential ENC/ENC input pins. For
brevity, the text will refer to ENC greater than ENC as ENC
high and ENC less than ENC as ENC low.
Each pipelined stage shown in Figure 1 contains an ADC,
a reconstruction DAC and an interstage residue amplifier.
In operation, the ADC quantizes the input to the stage and
the quantized value is subtracted from the input by the
DAC to produce a residue. The residue is amplified and
output by the residue amplifier. Successive stages operate
out of phase so that when the odd stages are outputting
their residue, the even stages are acquiring that residue
and visa versa.
APPLICATIO S I FOR ATIO
WU
UU
DIFF
REF
AMP
REF
BUF
INTERNAL
CLOCK SIGNALS
INTERNAL
REFERENCES TO ADC
DIFFERENTIAL
INPUT
LOW JITTER
CLOCK
DRIVER
RANGE
SELECT
2.35V
REFERENCE
ENC
OUTPUT
DRIVERS
SHIFT REGISTER AND CORRECTION
OE
MSBINV
OGND
OF
OVDD
0.5V TO
5V
D13
D0
CLKOUT
1746 F01
INPUT
S/H
FIRST STAGE
SENSE
VCM
AIN
–
AIN
+
4.7
F
SECOND STAGE
THIRD STAGE
FOURTH STAGE
5-BIT
PIPELINED
ADC STAGE
4-BIT
PIPELINED
ADC STAGE
4-BIT
PIPELINED
ADC STAGE
4-BIT
FLASH
ADC
CONTROL
LOGIC
REFLA
REFHB
4.7
F
1
F1F
0.1
F
0.1
F
REFHA
REFLB
Figure 1. Functional Block Diagram
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相关代理商/技术参数 |
参数描述 |
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| LTC1747CFW | 功能描述:IC ADC 12BIT 80MSPS 48-TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC1747CFW#PBF | 功能描述:IC ADC 12BIT 80MSPS 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| LTC1747CFW#TR | 功能描述:IC ADC SMPL 12BIT 80MSPS 48TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC1747CFW#TRPBF | 功能描述:IC ADC 12BIT 80MSPS 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| LTC1747IFW | 功能描述:IC ADC SMPL 12BIT 80MSPS 48TSSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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