参数资料
型号: LTC1772BES6#TRM
厂商: Linear Technology
文件页数: 11/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM SOT23-6
标准包装: 1
PWM 型: 电流模式
输出数: 1
频率 - 最大: 650kHz
占空比: 100%
电源电压: 2.5 V ~ 9.8 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: SOT-23-6 细型,TSOT-23-6
包装: 剪切带 (CT)
其它名称: LTC1772BES6
LTC1772BES6#TRMCT
LTC1772BES6-ND
LTC1772B
APPLICATIONS INFORMATION
current, 2) MOSFET gate charge current, 3) I 2 R losses
and 4) voltage drop of the output diode.
1. The V IN current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. V IN current results in a small loss
which increases with V IN .
2. MOSFET gate charge current results from switching
the gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from V IN to ground. The
resulting dQ/dt is a current out of V IN which is typically
much larger than the DC supply current. In continuous
mode, I GATECHG = f(Qp).
load current. For example, assuming a duty cycle of
50% with a Schottky diode forward voltage drop of
0.4V, the loss increases from 0.5% to 8% as the load
current increases from 0.5A to 2A.
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(V IN ) 2 I O(MAX) C RSS (f)
Other losses including C IN and C OUT ESR dissipative losses,
and inductor core losses, generally account for less than
2% total additional loss.
Foldback Current Limiting
3.
I 2 R
losses are predicted from the DC resistances of
As described in the Output Diode Selection, the worst-case
the MOSFET, inductor and current shunt. In continu-
ous mode the average output current ?ows through L
but is “chopped” between the P-channel MOSFET (in
series with R SENSE) and the output diode. The MOSFET
R DS(ON) plus R SENSE multiplied by duty cycle can be
summed with the resistances of L and R SENSE to obtain
I 2 R losses.
4. The output diode is a major source of power loss at
high currents and gets worse at high input voltages.
The diode loss is calculated by multiplying the forward
voltage times the diode duty cycle multiplied by the
LTC1772B
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continuously.
To prevent excessive heating in the diode, foldback current
limiting can be added to reduce the current in proportion
to the severity of the fault.
Foldback current limiting is implemented by adding diodes
D FB1 and D FB2 between the output and the I TH /RUN pin as
shown in Figure 6. In a hard short (V OUT = 0V), the current
will be reduced to approximately 50% of the maximum
output current.
V OUT
I TH /RUN V FB
R2
+
D FB1
R1
D FB2
1772 F05
Figure 6. Foldback Current Limiting
1772bfa
11
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