参数资料
型号: LTC1775IS#TR
厂商: Linear Technology
文件页数: 10/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 165kHz
占空比: 99%
电源电压: 4.3 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC1775
APPLICATIO S I FOR ATIO
I DS ( MAX ) =
=
Top Duty Cycle =
Bottom Duty Cycle = IN OUT
paidtotheresultingthermalissues.UnderDCconditions,
the maximum power that can be dissipated by a MOSFET
switch limits the current through it:
P T J ( MAX ) – T A
R DS ( ON ) θ JA R DS ( ON ) ρ TJ ( MAX )
For example, the SUD50N03-10 with T J(MAX) = 175 ° C,
T A =70 ° , θ JA = 30 ° C/W, R DS(ON) = 0.019 ? , ρ TJ(MAX) = 1.8
can operate with a maximum DC current of 10A. In a
switching application, the actual power dissipation is
increased by the transition losses and is reduced by the
switch duty cycle. When the LTC1775 is operating in
continuous mode, the duty cycles for the MOSFETs are:
V OUT
V IN
V – V
V IN
Operating Frequency and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation
requires more inductance for a given amount of ripple
current.
The internal oscillator runs at a nominal 150kHz frequency
when the SYNC pin is left open or connected to ground.
Pulling the SYNC pin above 1.2V will increase the fre-
quency by 50%. The oscillator will injection lock to a clock
signal applied to the SYNC pin with a frequency between
165kHz and 200kHz. The clock high level must exceed
1.2V for at least 1 μ s and no longer than 4 μ s as shown in
Figure 4. The top MOSFET turn-on will synchronize with
the rising edge of the clock.
1 μ s < t ON < 4 μ s
7V
The MOSFET power dissipations at maximum output
current are:
1.2V
= ? OUT ? ( I O ( MAX ) )( ρ T ( TOP ) )( R DS ( ON ) )
P TOP
? V ? 2
? V IN ?
+ ( k )( V IN )( I O ( MAX ) )( C RSS )( f )
2
0
5 μ s < t < 6 μ s
1775 F04
P BOT = ? IN OUT ? ( I O ( MAX ) )( ρ T ( BOT ) )( R DS ( ON ) )
? I L = ? OUT ? ? 1 – OUT ?
? V – V ? 2
? V IN ?
Both MOSFETs have I 2 R losses and the P TOP equation
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7 can be
used to estimate the amount of transition loss. The bottom
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle is nearly 100%. The
temperature rise of the MOSFETs depends on the effective
thermal resistance θ JA of the heat sink used in the applica-
tion. Check the temperature of the MOSFET when testing
applications and use appropriate heat sinking such as
board power planes to spread the heat.
10
Figure 4. SYNC Clock Waveform
Inductor Value Selection
Given the desired input and output voltages, the inductor
value and operating frequency directly determine the
ripple current:
? V ? ? V ?
? ( f )( L ) ? ? V IN ?
Lower ripple current reduces losses in the inductor, ESR
losses in the output capacitors and output voltage ripple.
Thus, highest efficiency operation is obtained at low
frequency with small ripple current. To achieve this, how-
ever, requires a large inductor.
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