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| 型号： | LTC1779ES6#TR |
| 厂商： | Linear Technology |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 0.25A SOT23-6 |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 9.8 V |
| 输入电压： | 2.5 V ~ 9.8 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 100kHz ~ 550kHz |
| 电流 - 输出： | 250mA |
| 同步整流器： | 无 |
| 工作温度： | -65°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | SOT-23-6 |
| 其它名称： | LTC1779ES6TR |
LTC1779
APPLICATIO S I FOR ATIO
Foldback Current Limiting
As described in the Output Diode Selection, the worst-
case dissipation occurs with a short-circuited output
when the diode conducts the current limit value almost
continuously. To prevent excessive heating in the diode,
foldback current limiting can be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding di-
odes D FB1 and D FB2 between the output and the I TH /RUN
pin as shown in Figure 6. In a hard short (V OUT = 0V), the
current will be reduced to approximately 50% of the
maximum output current.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1779. These items are illustrated graphically in the
layout diagram in Figure 7. Check the following in your
layout:
1. Large switch currents flow into the input capacitor C IN ,
the power switch and the Schottky diode D1. The loop
formed by these components should be as small as
possible.
2. Is the input decoupling capacitor (0.1 μ F) connected
closely between V IN (Pin 5) and ground (Pin 2)?
LTC1779
I TH /RUN V FB
R2
R1
+
D FB1
D FB2
V OUT
3. Keep the switching node SW away from sensitive small
signal nodes.
4. Does the V FB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of C OUT and signal
1779 F06
ground. Locate R1 and R2 close to the V FB pin.
Figure 6. Foldback Current Limiting
V IN
+
C IN
1
I TH /RUN
SW
6
SW
L1
V OUT
LTC1779
R ITH
C ITH
2
3
GND
V FB
V IN
SENSE –
5
4
R S
0.1 μ F
D1
+
C OUT
R1
R2
BOLD LINES INDICATE HIGH CURRENT PATHS
1779 F07
Figure 7. LTC1779 Layout Diagram (See PC Board Layout Checklist)
10
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