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| 型号： | LTC1968IMS8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/28页 |
| 文件大小： | 296K |
| 描述： | IC CONVERTER RMS-DC PREC 8MSOP |
| 标准包装： | 50 |
| 电流 - 电源： | 2.3mA |
| 电源电压： | 5.0V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
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3
LTC1968
1968f
The ?/SPAN> denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25?/SPAN>C. V
+
= 5V, V
OUTRTN
= 2.5V, C
AVE
= 10?/SPAN>F, V
IN
= 200mV
RMS
, V
ENABLE
= 0.5V
unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to GND and
V
+
. If the inputs are driven beyond the rails, the current should be limited
to less than 10mA.
Note 3: The LTC1968 output (V
OUT
) is high impedance and can be
overdriven, either sinking or sourcing current, to the limits stated.
Note 4: The LTC1968C/LTC1968I are guaranteed functional over the
operating temperature range of 40癈 to 85癈.
Note 5: The LTC1968C is guaranteed to meet specified performance from
0癈 to 70癈. The LTC1968C is designed, characterized and expected to
meet specified performance from 40癈 to 85癈 but is not tested nor QA
sampled at these temperatures. The LTC1968I is guaranteed to meet
specified performance from 40癈 to 85癈.
Note 6: High speed automatic testing cannot be performed with
C
AVE
= 10礔. The LTC1968 is 100% tested with C
AVE
= 47nF.
Note 7: The LTC1968 is 100% tested with DC and 10kHz input signals.
Measurements with DC inputs from 50mV to 350mV are used to calculate
the four parameters: G
ERR
, V
OOS
, V
IOS
and linearity error. Correlation tests
have shown that the performance limits can be guaranteed with the
additional testing being performed to guarantee proper operation of all
internal circuitry.
Note 8: The LTC1968 is inherently very linear. Unlike older log/antilog
circuits, its behavior is the same with DC and AC inputs, and DC inputs are
used for high speed testing.
Note 9: The power supply rejections of the LTC1968 are measured with
DC inputs from 50mV to 350mV. The change in accuracy from V
+
= 4.5V
to V
+
= 5.5V is divided by 1V.
Note 10: Previous generation RMS-to-DC converters required nonlinear
input stages as well as a nonlinear core. Some parts specify a DC reversal
error, combining the effects of input nonlinearity and input offset voltage.
The LTC1968 behavior is simpler to characterize and the input offset
voltage is the only significant source of DC reversal error.
Note 11: Guaranteed by design.
Note 12: The LTC1968 is a switched capacitor device and the input/output
impedance is an average impedance over many clock cycles. The input
impedance will not necessarily lead to an attenuation of the input signal
measured. Refer to the Applications Information section titled Input
Impedance for more information.
Note 13: The common mode rejection ratios of the LTC1968 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in V
IOS
measured with the input common mode voltage at 0V and
V
+
, divided by V
+
. The output CMRR is defined as the change in V
OOS
measured with OUT RTN = 0V and OUT RTN = V
+
350mV divided by
V
+
350mV.
Note 14: The LTC1968 input and output voltage swings are limited by
internal clipping. However, its ?topology is relatively tolerant of
momentary internal clipping.
Note 15: The LTC1968 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1968 is inherently wideband, but the output
accuracy is degraded by this aliased noise.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Output Characteristics
OVR
Output Voltage Range
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 0
V
+
V
Z
OUT
Output Impedance
(Note 12)
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 10 12.5 16
k&
CMRRO Output Common Mode Rejection
(Note 13)
?/DIV>
50 250 礦/V
V
OMAX
Maximum Differential Output Swing Accuracy = 1%, DC Input (Note 14)
1.0 1.05
V
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 0.9
V
PSRRO Power Supply Rejection
(Note 9)
?/DIV>
250 1000 礦/V
Frequency Response
f
1P
1% Additional Gain Error (Note 15)
500
kHz
f
3dB
?dB Frequency (Note 15)
15
MHz
Power Supplies
V
+
Supply Voltage
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 4.5
5.5
V
I
S
Supply Current
IN1 = 20mV, IN2 = 0V
?/DIV>
2.3 2.7
mA
IN1 = 200mV, IN2 = 0V
2.4
mA
Shutdown Characteristics
I
SS
Supply Current
V
ENABLE
= 4.5V
?/DIV>
0.1 10
礎
I
IH
ENABLE Pin Current High
V
ENABLE
= 4.5V
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 1 0.1
礎
I
IL
ENABLE Pin Current Low
V
ENABLE
= 0.5V
?SPAN class="pst LTC1968IMS8-TRPBF_2635133_9"> 3 0.5 0.1
礎
V
TH
ENABLE Threshold Voltage
2.1
V
V
HYS
ENABLE Threshold Hysteresis
0.1
V
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