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参数资料
| 型号： | LTC2055HVHMS8#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP ZERO DRFT DUAL LP 8MSOP |
| 标准包装： | 2,500 |
| 放大器类型： | 断路器（零漂移） |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.5 V/µs |
| 增益带宽积： | 500kHz |
| 电流 - 输入偏压： | 3pA |
| 电压 - 输入偏移： | 0.5µV |
| 电流 - 电源： | 150µA |
| 电压 - 电源，单路/双路(±)： | 2.7 V ~ 11 V，±1.35 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 带卷 (TR) |
LTC2054/LTC2055
10
20545fc
APPLICATIONS INFORMATION
Clock Feedthrough, Input Bias Current
The LTC2054 and LTC2055 use auto-zeroing circuitry
to achieve an almost zero DC offset over temperature,
common mode voltage, and power supply voltage. The
frequency of the clock used for auto-zeroing is typically
1.0kHz. The term “clock feedthrough” is broadly used to
indicate visibility of this clock frequency in the op amp
output spectrum. There are typically two types of clock
feedthrough in auto-zeroed op amps like the LTC2054/
LTC2055.
The rst form of clock feedthrough is caused by the settling
of the internal sampling capacitor and is input referred;
that is, it is multiplied by the closed loop gain of the op
amp. This form of clock feedthrough is independent of the
magnitude of the input source resistance or the magnitude
of the gain setting resistors. The LTC2054/LTC2055 have
an input referred residue clock feedthrough of less then
0.2μVRMS at 1.0kHz.
DC to 1Hz Noise
The second form of clock feedthrough is caused by the small
amount of charge injection occurring during the sampling
and holding of the op amp’s input offset voltage. The current
spikes are multiplied by the impedance seen at the input
terminals of the op amp, and the resulting voltage spikes
appear at the output multiplied by the closed loop gain
of the op amp. To reduce this form of clock feedthrough,
use smaller valued gain setting resistors and minimize the
source resistance at the input. If the resistance seen at the
inputs is less than 10kΩ, this form of clock feedthrough
is less than the amount of residue clock feedthrough from
the rst form described above.
Placing a capacitor across the feedback resistor reduces
either form of clock feedthrough by limiting the bandwidth
of the closed loop gain.
Input bias current is dened as the DC current into the
input pins of the op amp. The same current spikes that
DC to 10Hz Noise
0.4μV
10 SEC
20545 F01
1μV
1 SEC
20545 F02
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| LTC2055HVIDD | 功能描述:IC OPAMP 0-DRIFT DUAL LP HV 8DFN RoHS:否 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:100 系列:- 放大器类型:通用 电路数:1 输出类型:- 转换速率:0.2 V/µs 增益带宽积:- -3db带宽:- 电流 - 输入偏压:100pA 电压 - 输入偏移:30µV 电流 - 电源:380µA 电流 - 输出 / 通道:- 电压 - 电源，单路/双路(±):±2 V ~ 18 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SO 包装:管件 |
| LTC2055HVIDD#PBF | 功能描述:IC OPAMP ZERO DRIFT DUAL LP 8DFN RoHS:是 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:100 系列:- 放大器类型:通用 电路数:1 输出类型:- 转换速率:0.2 V/µs 增益带宽积:- -3db带宽:- 电流 - 输入偏压:100pA 电压 - 输入偏移:30µV 电流 - 电源:380µA 电流 - 输出 / 通道:- 电压 - 电源，单路/双路(±):±2 V ~ 18 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SO 包装:管件 |
| LTC2055HVIDD#TR | 功能描述:IC OPAMP 0-DRIFT DUAL LP HV 8DFN RoHS:否 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:100 系列:- 放大器类型:通用 电路数:1 输出类型:- 转换速率:0.2 V/µs 增益带宽积:- -3db带宽:- 电流 - 输入偏压:100pA 电压 - 输入偏移:30µV 电流 - 电源:380µA 电流 - 输出 / 通道:- 电压 - 电源，单路/双路(±):±2 V ~ 18 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SO 包装:管件 |
| LTC2055HVIDD#TRPBF | 功能描述:IC OPAMP ZERO DRIFT DUAL LP 8DFN RoHS:是 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:100 系列:- 放大器类型:通用 电路数:1 输出类型:- 转换速率:0.2 V/µs 增益带宽积:- -3db带宽:- 电流 - 输入偏压:100pA 电压 - 输入偏移:30µV 电流 - 电源:380µA 电流 - 输出 / 通道:- 电压 - 电源，单路/双路(±):±2 V ~ 18 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SO 包装:管件 |
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