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参数资料
| 型号： | LTC2222IUK-11#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 11BIT 105MSPS SAMPL 48QFN |
| 标准包装： | 2,000 |
| 位数： | 11 |
| 采样率（每秒）： | 105M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 535mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN-EP（7x7） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个单端，双极; 1 个差分，双极 |
LTC2222-11
17
222211f
Input Range
The input range can be set based on the application. The
2V input range will provide the best signal-to-noise perfor-
mance while maintaining excellent SFDR. The 1V input
range will have better SFDR performance, but the SNR will
degrade by 3.2dB. See the Typical Performance Charac-
teristics section.
Driving the Encode Inputs
The noise performance of the LTC2222-11 can depend on
the encode signal quality as much as on the analog input.
The ENC+/ENC– inputs are intended to be driven differen-
tially, primarily for noise immunity from common mode
noise sources. Each input is biased through a 6k resistor
to a 1.6V bias. The bias resistors set the DC operating point
for transformer coupled drive circuits and can set the logic
threshold for single-ended drive circuits.
Any noise present on the encode signal will result in
additional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies) take the following into consideration:
1. Differential drive should be used.
APPLICATIO S I FOR ATIO
WU
UU
2. Use as large an amplitude as possible; if transformer
coupled use a higher turns ratio to increase the amplitude.
3. If the ADC is clocked with a sinusoidal signal, filter the
encode signal to reduce wideband noise.
4. Balance the capacitance and series resistance at both
encode inputs so that any coupled noise will appear at both
inputs as common mode noise. The encode inputs have a
common mode range of 1.1V to 2.5V. Each input may be
driven from ground to VDD for single-ended drive.
Maximum and Minimum Encode Rates
The maximum encode rate for the LTC2222-11 is 105Msps.
For the ADC to operate properly, the encode signal should
have a 50% (
±5%) duty cycle. Each half cycle must have
at least 4.5ns for the ADC internal circuitry to have enough
settling time for proper operation. Achieving a precise
50% duty cycle is easy with differential sinusoidal drive
using a transformer or using symmetric differential logic
such as PECL or LVDS.
An optional clock duty cycle stabilizer circuit can be used
if the input clock has a non 50% duty cycle. This circuit
uses the rising edge of the ENC+ pin to sample the analog
input. The falling edge of ENC+ is ignored and the internal
falling edge is generated by a phase-locked loop. The input
clock duty cycle can vary from 20% to 80% and the clock
duty cycle stabilizer will maintain a constant 50% internal
duty cycle. If the clock is turned off for a long period of
time, the duty cycle stabilizer circuit will require one
hundred clock cycles for the PLL to lock onto the input
clock. To use the clock duty cycle stabilizer, the MODE pin
should be connected to 1/3VDD or 2/3VDD using external
resistors.
The lower limit of the LTC2222-11 sample rate is deter-
mined by droop of the sample-and-hold circuits. The
pipelined architecture of this ADC relies on storing analog
signals on small valued capacitors. Junction leakage will
discharge the capacitors. The specified minimum operat-
ing frequency for the LTC2222-11 is 1Msps.
VDD
LTC2222-11
222211 F11
VDD
ENC–
ENC+
1.6V BIAS
1:4
0.1
F
CLOCK
INPUT
50
6k
TO INTERNAL
ADC CIRCUITS
Figure 11. Transformer Driven ENC+/ENC–
相关PDF资料 |
PDF描述 |
|---|---|
| LTC2223IUK#TRPBF | IC ADC 12BIT 80MSPS SAMPLE 48QFN |
| LTC2224IUK#TRPBF | IC ADC 12BIT 135MSPS SAMPL 48QFN |
| LTC2225IUH#TRPBF | IC ADC 12BIT 10MSPS 3V 32-QFN |
| LTC2228IUH#TRPBF | IC ADC 12BIT 65MSPS SAMPL 32-QFN |
| LTC2229IUH#PBF | IC ADC 12-BIT 80MSPS 3V 32-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2222UK | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit,105Msps/80Msps ADCs |
| LTC2222UK-11 | 制造商:LINER 制造商全称:Linear Technology 功能描述:11-Bit, 105Msps ADC |
| LTC2223 | 制造商:LINER 制造商全称:Linear Technology 功能描述:12-Bit,105Msps/80Msps ADCs |
| LTC2223CUK | 功能描述:IC ADC 12BIT 80MSPS SAMPLE 48QFN RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC2223CUK#PBF | 功能描述:IC ADC 12BIT 80MSPS SAMPLE 48QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 其它有关文件:TSA1204 View All Specifications 标准包装:1 系列:- 位数:12 采样率（每秒）:20M 数据接口:并联 转换器数目:2 功率耗散（最大）:155mW 电压电源:模拟和数字 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:Digi-Reel® 输入数目和类型:4 个单端，单极；2 个差分，单极 产品目录页面:1156 (CN2011-ZH PDF) 其它名称:497-5435-6 |
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