- 您现在的位置：买卖IC网 > PDF目录10117 > LTC2231CUP#PBF (Linear Technology)IC ADC 10BIT 135MSPS 64-QFN PDF资料下载
参数资料
| 型号： | LTC2231CUP#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 18/32页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 135MSPS 64-QFN |
| 标准包装： | 40 |
| 位数： | 10 |
| 采样率（每秒）： | 135M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 924mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-WFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（9x9） |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极; 1 个差分，双极 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
LTC2230/LTC2231
25
22301fb
APPLICATIO S I FOR ATIO
WU
UU
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OVDD, should be tied
to the same power supply as for the logic being driven. For
example if the converter is driving a DSP powered by a 1.8V
supply then OVDD should be tied to that same 1.8V supply.
In the CMOS output mode, OVDD can be powered with any
voltage up to 3.6V. OGND can be powered with any voltage
from GND up to 1V and must be less than OVDD. The logic
outputs will swing between OGND and OVDD.
In the LVDS output mode, OVDD should be connected to a
3.3V supply and OGND should be connected to GND.
Output Enable
The outputs may be disabled with the output enable pin, OE.
In CMOS or LVDS output modes OE high disables all data
outputs including OF and CLKOUT. The data access and bus
relinquish times are too slow to allow the outputs to be
enabled and disabled during full speed operation. The output
Hi-Z state is intended for use during long periods of inac-
tivity.
The Hi-Z state is not a truly open circuit; the output pins that
make an LVDS output pair have a 20k resistance between
them. Therefore in the CMOS output mode, adjacent data
bits will have 20k resistance in between them, even in the
Hi-Z state.
Sleep and Nap Modes
The converter may be placed in shutdown or nap modes
to conserve power. Connecting SHDN to GND results in
normal operation. Connecting SHDN to VDD and OE to VDD
results in sleep mode, which powers down all circuitry
including the reference and typically dissipates 1mW. When
exiting sleep mode it will take milliseconds for the output
data to become valid because the reference capacitors have
to recharge and stabilize. Connecting SHDN to VDD and OE
to GND results in nap mode, which typically dissipates
35mW. In nap mode, the on-chip reference circuit is kept
on, so that recovery from nap mode is faster than that from
sleep mode, typically taking 100 clock cycles. In both sleep
and nap mode all digital outputs are disabled and enter the
Hi-Z state.
GROUNDING AND BYPASSING
The LTC2230/LTC2231 requires a printed circuit board with
a clean unbroken ground plane. A multilayer board with an
internal ground plane is recommended. Layout for the
printed circuit board should ensure that digital and analog
signal lines are separated as much as possible. In particu-
lar, care should be taken not to run any digital track along-
side an analog signal track or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the VDD,OVDD,VCM,REFHA,REFHB,REFLAandREFLBpins
as shown in the block diagram on the front page of this data
sheet. Bypass capacitors must be located as close to the
pins as possible. Of particular importance are the capaci-
tors between REFHA and REFLB and between REFHB and
REFLA. These capacitors should be as close to the device
as possible (1.5mm or less). Size 0402 ceramic capacitors
are recommended. The 2.2
μFcapacitorbetweenREFHAand
REFLA can be somewhat further away. The traces connect-
ing the pins and bypass capacitors must be kept short and
should be made as wide as possible.
The LTC2230/LTC2231 differential inputs should run par-
allel and close to each other. The input traces should be as
short as possible to minimize capacitance and to minimize
noise pickup.
HEAT TRANSFER
Most of the heat generated by the LTC2230/LTC2231 is
transferred from the die through the bottom-side exposed
pad and package leads onto the printed circuit board. For
good electrical and thermal performance, the exposed pad
should be soldered to a large grounded pad on the PC board.
It is critical that all ground pins are connected to a ground
plane of sufficient area.
相关PDF资料 |
PDF描述 |
|---|---|
| VI-2NV-MX-F3 | CONVERTER MOD DC/DC 5.8V 75W |
| VI-2NV-MX-F2 | CONVERTER MOD DC/DC 5.8V 75W |
| MS3102A20-16S | CONN RCPT 9POS BOX MNT W/SCKT |
| ADM206ARZ | IC TXRX RS-232 5V SD/EN 24SOIC |
| ADM3312EARU | IC TXRX RS-232 TRI 2.7V 24TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2231IUP | 制造商:LINER 制造商全称:Linear Technology 功能描述:Electrical Specifications Subject to Change |
| LTC2231IUP#PBF | 功能描述:IC ADC 10BIT 135MSPS 64-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC2231IUP#TRPBF | 功能描述:IC ADC 10BIT 135MSPS 64-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| LTC2231UP | 制造商:LINER 制造商全称:Linear Technology 功能描述:10-Bit,170Msps/135Msps ADCs |
| LTC2232 | 制造商:LINER 制造商全称:Linear Technology 功能描述:14-Bit, 80Msps Low Power 3V ADC |
发布紧急采购，3分钟左右您将得到回复。