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参数资料
| 型号： | LTC2233IUK#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 80MSPS SAMPLE 48QFN |
| 标准包装： | 52 |
| 位数： | 10 |
| 采样率（每秒）： | 80M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 406mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN-EP（7x7） |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极; 1 个差分，双极 |
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LTC2232/LTC2233
22
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Data Format
The LTC2232/LTC2233 parallel digital output can be se-
lected for offset binary or 2’s complement format. The
format is selected with the MODE pin. Connecting MODE
to GND or 1/3VDD selects offset binary output format.
Connecting MODE to 2/3VDD or VDD selects 2’s comple-
ment output format. An external resistor divider can be
used to set the 1/3VDD or 2/3VDD logic values. Table 2
shows the logic states for the MODE pin.
APPLICATIO S I FOR ATIO
WU
UU
Overflow Bit
When OF outputs a logic high the converter is either
overranged or underranged.
Output Clock
The ADC has a delayed version of the ENC+ input available
as a digital output, CLKOUT. The CLKOUT pin can be used
to synchronize the converter data to the digital system. This
is necessary when using a sinusoidal encode. Data will be
updated just after CLKOUT rises and can be latched on the
falling edge of CLKOUT.
Table 2. MODE Pin Function
Clock Duty
MODE Pin
Output Format
Cycle Stablizer
0
Offset Binary
Off
1/3VDD
Offset Binary
On
2/3VDD
2’s Complement
On
VDD
2’s Complement
Off
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OVDD, should be tied
to the same power supply as for the logic being driven. For
example if the converter is driving a DSP powered by a 1.8V
supply then OVDD should be tied to that same 1.8V supply.
OVDD can be powered with any voltage up to 3.6V. OGND
can be powered with any voltage from GND up to 1V and
must be less than OVDD. The logic outputs will swing be-
tween OGND and OVDD.
Output Enable
The outputs may be disabled with the output enable pin, OE.
OE high disables all data outputs including OF and CLKOUT.
The data access and bus relinquish times are too slow to
allow the outputs to be enabled and disabled during full
speed operation. The output Hi-Z state is intended for use
during long periods of inactivity.
Sleep and Nap Modes
The converter may be placed in shutdown or nap modes
to conserve power. Connecting SHDN to GND results in
normal operation. Connecting SHDN to VDD and OE to VDD
results in sleep mode, which powers down all circuitry
including the reference and typically dissipates 1mW. When
exiting sleep mode it will take milliseconds for the output
data to become valid because the reference capacitors have
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2233UK | 制造商:LINER 制造商全称:Linear Technology 功能描述:10-Bit,105Msps/80Msps ADCs |
| LTC2234 | 制造商:LINER 制造商全称:Linear Technology 功能描述:14-Bit, 80Msps Low Power 3V ADC |
| LTC2234CUK | 功能描述:IC ADC 10BIT 135MSPS SAMPL 48QFN RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC2234CUK#PBF | 功能描述:IC ADC 10BIT 135MSPS SAMPL 48QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC2234CUK#TR | 功能描述:IC ADC 10BIT 135MSPS SAMPL 48QFN RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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