参数资料
型号: LTC2233IUK#TRPBF
厂商: Linear Technology
文件页数: 16/28页
文件大小: 0K
描述: IC ADC 10BIT 80MSPS SAMPL 48QFN
标准包装: 2,000
位数: 10
采样率(每秒): 80M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 406mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-QFN-EP(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个单端,双极; 1 个差分,双极
LTC2232/LTC2233
23
22323fa
to recharge and stabilize. Connecting SHDN to VDD and OE
to GND results in nap mode, which typically dissipates
30mW. In nap mode, the on-chip reference circuit is kept
on, so that recovery from nap mode is faster than that from
sleep mode, typically taking 100 clock cycles. In both sleep
and nap mode all digital outputs are disabled and enter the
Hi-Z state.
GROUNDING AND BYPASSING
The LTC2232/LTC2233 requires a printed circuit board with
a clean unbroken ground plane. A multilayer board with an
internal ground plane is recommended. Layout for the
printed circuit board should ensure that digital and analog
signal lines are separated as much as possible. In particu-
lar, care should be taken not to run any digital track along-
side an analog signal track or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the VDD,OVDD,VCM,REFHA,REFHB,REFLAandREFLBpins
as shown in the block diagram on the front page of this data
sheet. Bypass capacitors must be located as close to the
pins as possible. Of particular importance are the capaci-
tors between REFHA and REFLB and between REFHB and
REFLA. These capacitors should be as close to the device
as possible (1.5mm or less). Size 0402 ceramic capacitors
are recommended. The 2.2
FcapacitorbetweenREFHAand
REFLA can be somewhat further away. The traces connect-
ing the pins and bypass capacitors must be kept short and
should be made as wide as possible.
The LTC2232/LTC2233 differential inputs should run par-
allel and close to each other. The input traces should be as
short as possible to minimize capacitance and to minimize
noise pickup.
HEAT TRANSFER
Most of the heat generated by the LTC2232/LTC2233 is
transferred from the die through the bottom-side exposed
pad and package leads onto the printed circuit board. For
good electrical and thermal performance, the exposed pad
should be soldered to a large grounded pad on the PC board.
It is critical that all ground pins are connected to a ground
plane of sufficient area.
APPLICATIO S I FOR ATIO
WU
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