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参数资料
| 型号： | LTC2383IMS-16#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 2/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 1CH 1MSPS 16-MSOP |
| 标准包装： | 37 |
| 位数： | 16 |
| 采样率（每秒）： | 1M |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 16.25mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TFSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 16-MSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | DC1571A-A-ND - BOARD SAR ADC LTC2383-16 |
LTC2383-16
10
238316f
OVERVIEW
The LTC2383-16 is a low noise, low power, high speed 16-bit
successive approximation register (SAR) ADC. Operating
from a single 2.5V supply, the LTC2383-16 supports a
large ±2.5V fully differential input range, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2383-16 achieves ±2LSB INL max,
no missing codes at 16-bits and 92dB SNR.
Fast 1Msps throughput with no cycle latency makes the
LTC2383-16 ideally suited for a wide variety of high speed
applications. An internal oscillator sets the conversion time,
easing external timing considerations. The LTC2383-16
dissipates only 13mW at 1Msps, while an auto power-down
feature is provided to further reduce power dissipation
during inactive periods.
CONVERTER OPERATION
The LTC2383-16 operates in two phases. During the
acquisition phase, the charge redistribution capacitor D/A
converter (CDAC) is connected to the IN+ and IN– pins
to sample the differential analog input voltage. A rising
edge on the CNV pin initiates a conversion. During the
conversion phase, the 16-bit CDAC is sequenced through a
successive approximation algorithm, effectively comparing
the sampled input with binary-weighted fractions of the
reference voltage (e.g. VREF/2,VREF/4…VREF/65536)using
the differential comparator. At the end of conversion, the
CDAC output approximates the sampled analog input. The
ADC control logic then prepares the 16-bit digital output
code for serial transfer.
TRANSFER FUNCTION
The LTC2383-16 digitizes the full-scale voltage of 2 × REF
into 216 levels, resulting in an LSB size of 76μV with
REF = 2.5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2383-16 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent
APPLICATIONS INFORMATION
Figure 2. LTC2383-16 Transfer Function
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
(TWO’S
COMPLEMENT)
–1
LSB
238316 F02
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FSR/2 – 1LSB
–FSR/2
FSR = +FS – –FS
1LSB = FSR/65536
circuit shown in Figure 3. The diodes at the input provide
ESD protection. In the acquisition phase, each input sees
approximately 45pF (CIN)fromthesamplingCDACinseries
with 40Ω (RON) from the on-resistance of the sampling
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw a current spike while charging
the CIN capacitors during acquisition. During conversion,
the analog inputs draw only a small leakage current.
RON
CIN
RON
REF
CIN
IN+
IN–
BIAS
VOLTAGE
238316 F03
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the LTC2383-16
INPUT DRIVE CIRCUITS
A low impedance source can directly drive the high
impedance inputs of the LTC2383-16 without gain error.
A high impedance source should be buffered to minimize
settling time during acquisition and to optimize the
distortion performance of the ADC. Minimizing settling
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