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参数资料
| 型号： | LTC2400C |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | ADC |
| 英文描述： | 24-Bit uPower No Latency ADC in SO-8 |
| 中文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO8 |
| 封装： | 0.150 INCH, PLASTIC, SO-8 |
| 文件页数： | 15/40页 |
| 文件大小： | 455K |
| 代理商： | LTC2400C |
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15
LTC2400
APPLICATIO
S I
N
FOR
ATIO
U
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 5.
The serial clock mode is selected on the falling edge of CS.
To select the external serial clock mode, the serial clock pin
(SCK) must be LOW during each CS falling edge.
The serial data output pin (SDO) is HI-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is pulled LOW, EOC is output to the SDO pin. EOC
= 1 while a conversion is in progress and EOC = 0 if the
device is in the sleep state. Independent of CS, the device
automatically enters the low power sleep state once the
conversion is complete.
When the device is in the sleep state (EOC = 0), its
conversion result is held in an internal static shift regis-
ter. The device remains in the sleep state until the first
rising edge of SCK is seen while CS is LOW. Data is
shifted
W
U
out the SDO pin on each falling edge of SCK. This enables
external circuitry to latch the output on the rising edge of
SCK. EOC can be latched on the first rising edge of SCK
and the last bit of the conversion result can be latched on
the 32nd rising edge of SCK. On the 32nd falling edge of
SCK, the device begins a new conversion. SDO goes HIGH
(EOC = 1) indicating a conversion is in progress.
At the conclusion of the data cycle, CS may remain LOW
and EOC monitored as an end-of-conversion interrupt.
Alternatively, CS may be driven HIGH setting SDO to HI-Z.
As described above, CS may be pulled LOW at any time in
order to monitor the conversion status.
Typically, CS remains LOW during the data output state.
However, the data output state may be aborted by pulling
CS HIGH anytime between the first rising edge and the
32nd falling edge of SCK, see Figure 6. On the rising edge
of CS, the device aborts the data output state and imme-
diately initiates a new conversion. This is useful for sys-
tems not requiring all 32 bits of output data, aborting an
invalid conversion cycle or synchronizing the start of a
conversion.
EOC
BIT 31
SDO
SCK
(EXTERNAL)
CS
V
CC
F
O
V
REF
SCK
V
IN
SDO
GND
CS
V
REF
0.1V TO V
CC
V
IN
–0.12V
REF
TO 1.12V
REF
1
μ
F
2.7V TO 5.5V
LTC2400
TEST EOC
MSB
SUB LSB
EXR
SIG
BIT 0
LSB
BIT 4
BIT 27
BIT 26
BIT 28
BIT 29
BIT 30
SLEEP
DATA OUTPUT
CONVERSION
2400 F05
CONVERSION
= 50Hz REJECTION
= EXTERNAL OSCILLATOR
= 60Hz REJECTION
Hi-Z
Hi-Z
Hi-Z
V
CC
TEST EOC
TEST EOC
Figure 5. External Serial Clock, Single Cycle Operation
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| LTC2400CS8#PBF | 功能描述:IC A/D CONV 24BIT MICRPWR 8-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:microPOWER™ 位数:8 采样率（每秒）:1M 数据接口:串行，SPI? 转换器数目:1 功率耗散（最大）:- 电压电源:模拟和数字 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商设备封装:24-VQFN 裸露焊盘（4x4） 包装:Digi-Reel® 输入数目和类型:8 个单端，单极 产品目录页面:892 (CN2011-ZH PDF) 其它名称:296-25851-6 |
| LTC2400CS8#PBF | 制造商:Linear Technology 功能描述:A/D Converter (A-D) IC |
| LTC2400CS8#TR | 功能描述:IC ADC 24BIT MICROPOWER 8SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
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