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参数资料
| 型号： | LTC2453IDDB#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/18页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 8-DFN |
| 标准包装： | 2,500 |
| 位数： | 16 |
| 采样率（每秒）： | 60 |
| 数据接口： | I²C，串行 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 4mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN（3x2） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | DC1266A-A-ND - BOARD DELTA SIGMA ADC LTC2453 |
LTC2453
11
2453fc
Driving VCC and GND
In relation to the VCC and GND pins, the LTC2453 com-
bines internal high frequency decoupling with damping
elements, which reduce the ADC performance sensitivity
to PCB layout and external components. Nevertheless, the
very high accuracy of this converter is best preserved by
careful low and high frequency power supply decoupling.
A 0.1F, high quality, ceramic capacitor in parallel with a
10F ceramic capacitor should be connected between the
VCC and GND pins, as close as possible to the package.
The 0.1F capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path, starting from the converter VCC pin, passing through
these two decoupling capacitors, and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Very low impedance ground and power planes, and star
connections at both VCC and GND pins, are preferable. The
VCC pin should have three distinct connections: the first to
RSW
15k
(TYP)
ILEAK
VCC
CEQ
0.35pF
(TYP)
IN+
IN–
REF–
REF+
2453 F08
RSW
15k
(TYP)
ILEAK
RSW
15k
(TYP)
ILEAK
RSW
15k
(TYP)
ILEAK
Figure 8. LTC2453 Analog Input/Reference Equivalent Circuit
ILEAK
RSW
15k
(TYP)
ICONV
CIN
IN+
VCC
SIG+
SIG–
RS
CEQ
0.35pF
(TYP)
CPAR
+–
2453 F09
ILEAK
RSW
15k
(TYP)
ICONV
CIN
IN–
VCC
RS
CEQ
0.35pF
(TYP)
CPAR
+–
Figure 9. LTC2453 Input Drive Equivalent Circuit
the decoupling capacitors described above, the second to
the ground return for the input signal source, and the third
to the ground return for the power supply voltage source.
Driving REF+ and REF–
A simplified equivalent circuit for REF+ and REF– is shown
in Figure 8. Like all other A/D converters, the LTC2453 is
only as accurate as the reference it is using. Therefore, it
is important to keep the reference line quiet by careful low
and high frequency power supply decoupling.
The LT6660 reference is an ideal match for driving the
LTC2453’s REF+ pin. The LTC6660 is available in a 2mm
× 2mm DFN package with 2.5V, 3V, 3.3V and 5V options.
A 0.1F, high quality, ceramic capacitor in parallel with
a 10F ceramic capacitor should be connected between
the REF+/REF– and GND pins, as close as possible to the
package. The 0.1F capacitor should be placed closest
to the ADC.
Driving VIN+ and VIN–
The input drive requirements can best be analyzed using
the equivalent circuit of Figure 9. The input signal VSIG is
connected to the ADC input pins (IN+ and IN–) through
an equivalent source resistance RS. This resistor includes
both the actual generator source resistance and any ad-
ditional optional resistors connected to the input pins.
Optional input capacitors CIN are also connected to the
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