参数资料
| 型号： | LTC2607IDE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT R-R I2C 12-DFN |
| 标准包装： | 2,500 |
| 设置时间： | 10µs |
| 位数： | 16 |
| 数据接口： | I²C |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 780µW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFDFN 裸露焊盘 |
| 供应商设备封装： | 12-DFN（4x3） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 2 电压，单极 |
| 采样率（每秒）： | * |
| 配用： | DC934A-ND - BOARD DAC LTC2607 |
LTC2607/LTC2617/LTC2627
26071727fa
in 27 selectable addresses for the part. The slave address
assignments are shown in Table 1.
Table 1. Slave Address Map
CA2
CA1
CA0
SA6 SA5 SA4 SA3 SA2 SA1 SA0
GND
0
1
0
GND
FLOAT
0
1
0
1
GND
VCC
0
1
0
1
0
GND
FLOAT
GND
0
1
0
1
GND
FLOAT FLOAT
0
1
0
GND
FLOAT
VCC
0
1
0
1
GND
VCC
GND
0
1
0
1
0
GND
VCC
FLOAT
0
1
0
1
GND
VCC
0
1
0
FLOAT
GND
0
1
0
1
FLOAT
GND
FLOAT
0
1
0
1
0
FLOAT
GND
VCC
0
1
0
1
FLOAT FLOAT
GND
1
0
FLOAT FLOAT FLOAT
1
0
1
FLOAT FLOAT
VCC
1
0
1
0
FLOAT
VCC
GND
1
0
1
FLOAT
VCC
FLOAT
1
0
1
0
FLOAT
VCC
1
0
1
0
1
VCC
GND
1
0
1
0
1
0
VCC
GND
FLOAT
1
0
1
0
1
VCC
GND
VCC
1
0
VCC
FLOAT
GND
1
0
1
VCC
FLOAT FLOAT
1
0
1
0
VCC
FLOAT
VCC
1
0
1
VCC
GND
1
0
VCC
FLOAT
1
0
1
VCC
1
0
1
0
GLOBAL ADDRESS
1
0
1
In addition to the address selected by the address pins,
the parts also respond to a global address. This address
allows a common write to all LTC2607, LTC2617 and
LTC2627 parts to be accomplished with one 3-byte write
transaction on the I2C bus. The global address is a 7-bit
on-chip hardwired address and is not selectable by CA0,
CA1 and CA2.
operation
The addresses corresponding to the states of CA0, CA1
and CA2 and the global address are shown in Table 1. The
maximum capacitive load allowed on the address pins
(CA0,CA1andCA2)is10pF,asthesepinsaredrivenduring
address detection to determine if they are floating.
Write Word Protocol
The master initiates communication with the LTC2607/
LTC2617/LTC2627withaSTARTconditionanda7-bitslave
address followed by the Write bit (W) = 0. The LTC2607/
LTC2617/LTC2627 acknowledges by pulling the SDA pin
low at the 9th clock if the 7-bit slave address matches the
address of the parts (set by CA0, CA1 and CA2) or the
global address. The master then transmits three bytes of
data. The LTC2607/LTC2617/LTC2627 acknowledges each
byte of data by pulling the SDA line low at the 9th clock of
eachdatabytetransmission.Afterreceivingthreecomplete
bytesofdata,theLTC2607/LTC2617/LTC2627executesthe
command specified in the 24-bit input word.
If more than three data bytes are transmitted after a valid
7-bitslaveaddress,theLTC2607/LTC2617/LTC2627donot
acknowledge the extra bytes of data (SDA is high during
the 9th clock).
The format of the three data bytes is shown in Figure 3.
The first byte of the input word consists of the 4-bit com-
mand word C3-C0, and 4-bit DAC address A3-A0. The next
two bytes consist of the 16-bit data word. The 16-bit data
word consists of the 16-, 14- or 12-bit input code, MSB
to LSB, followed by 0, 2 or 4 don’t care bits (LTC2607,
LTC2617 and LTC2627 respectively). A typical LTC2607
write transaction is shown in Figure 4.
The command (C3-C0) and address (A3-A0) assignments
are shown in Table 2. The first four commands in the table
consist of write and update operations. A write operation
loads a 16-bit data word from the 32-bit shift register
into the input register of the selected DAC, n. An update
operation copies the data word from the input register to
the DAC register. Once copied into the DAC register, the
data word becomes the active 16-, 14- or 12-bit input
code, and is converted to an analog voltage at the DAC
output. The update operation also powers up the selected
DAC if it had been in power-down mode. The data path
and registers are shown in the Block Diagram.
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