参数资料
型号: LTC2846IG#TRPBF
厂商: Linear Technology
文件页数: 3/24页
文件大小: 0K
描述: IC TXRX 3.3V MULTIPROTCOL 36SSOP
标准包装: 2,000
类型: 收发器
驱动器/接收器数: 3/3
规程: 多协议
电源电压: 3.3V
安装类型: 表面贴装
封装/外壳: 36-SSOP(0.209",5.30mm 宽)
供应商设备封装: 36-SSOP
包装: 带卷 (TR)
11
LTC2846
sn2846 2846fs
Figure 15. V.28 Driver Propagation Delays
Figure 16. V.28 Receiver Propagation Delays
SWITCHI G TI E WAVEFOR S
UW
W
APPLICATIO S I FOR ATIO
WU
UU
3V
0V
1.5V
0V
–3V
3V
1.5V
0V
3V
–3V
tPHL
tf
VO
–VO
D
A
tPLH
tr
2846 F15
SR = 6V
tf
SR = 6V
tr
VIH
VIL
1.5V
1.65V
1.5V
1.65V
tPHL
VOH
VOL
A
R
tPLH
2846 F16
Overview
The LTC2846 consists of a boost switching regulator, a
charge pump and a 3-driver/3-receiver transceiver. The
boost switching regulator generates a 5V VCC from the
3.3V input at VIN to power the charge pump and trans-
ceiver. The charge pump generates the VDD and VEE
supplies. The LTC2846’s VCC, VDD and VEE supplies can
be used to power a companion chip like the LTC2844 or
LTC2845. The receiver outputs are driven between 0V and
VIN to interface with 3.3V logic.
The LTC2846 and LTC2844 form a complete software-
selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. Cable termination is provided on-chip, elimi-
nating the need for discrete termination designs.
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 17. The LTC2846 half of each port
is used to generate and appropriately terminate the clock
and data signals. The LTC2844 is used to generate the
control signals along with LL (Local Loopback).
Mode Selection
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see Table 1).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon-
nected (1) or wired to ground (0) in the cable as shown in
Figure 18. The internal pull-up current sources will ensure
a binary 1 when a pin is left unconnected.
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VIN.
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