参数资料
| 型号： | LTC3035EDDB#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ .3A 8-DFN |
| 产品培训模块： | More Information on LDOs |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.4 V ~ 3.6 V |
| 输入电压： | 1.7 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.045V @ 300mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 300mA（最小） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN（3x2） |
| 包装： | 带卷 (TR) |
LTC3035
APPLICATIO S I FOR ATIO
20
0
–20
BOTH CAPACITORS ARE 1 μ F,
6.3V, 0402 CASE SIZE
available current, a 0.1 μ F or greater ceramic capacitor
should be used. Warning: A polarized capacitor such as
tantalum or aluminum should never be used for the flying
capacitor since its voltage can reverse upon start-up of the
–40
–60
–80
Y5V
X5R
LTC3035. Low ESR ceramic capacitors should always be
used for the flying capacitor.
A 1 μ F or greater low ESR (<0.1 ? ) ceramic capacitor is
recommended to bypass the BIAS pin. Larger values of
capacitance will not reduce the size of the BIAS ripple
–100
0
1
2 3 4 5
DC BIAS VOLTAGE (V)
6
much, but will decrease the ripple frequency proportion-
ally. The BIAS pin should maintain 0.4 μ F of capacitance at
3035 F05
Figure 5. Ceramic Capacitor DC Bias Characteristics
20
0
X5R
all times to ensure correct operation. High ESR tantalum
and electrolytic capacitors may be used, but a low ESR
ceramic must be used in parallel for correct operation. It
is also recommended that IN be bypassed to ground with
a 1 μ F or greater ceramic capacitor.
–20
–40
–60
–80
Y5V
BOTH CAPACITORS ARE 1 μ F,
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125 ° C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
–100
6.3V, 0402 CASE SIZE
–50 –25 0 25 50
TEMPERATURE ( ° C)
75
3035 F06
(I OUT )(V IN – V OUT )
The LTC3035 has internal thermal limiting designed to
Figure 6. Ceramic Capacitor Temperature Characteristics
temperature range. The X5R only loses about 40% of its
rated capacitance over the operating temperature range.
The X5R and X7R dielectrics result in more stable charac-
teristics and are more suitable for use as the output
capacitor. The X7R type has better stability across tem-
perature and bias voltage, while the X5R is less expensive
and is available in higher values. In all cases, the output
capacitance should never drop below 0.4 μ F, or instability
or degraded performance may occur.
Charge Pump Component Selection
The flying capacitor controls the strength of the charge
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125 ° C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat
generated by power devices.
A junction to ambient thermal coefficient of 76 ° C/W is
achieved by connecting the Exposed Pad of the DFN
package directly to a ground plane of about 2500mm 2 .
pump. In order for the charge pump to deliver its maximum
3035f
8
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