参数资料
型号: LTC3105EDD#TRPBF
厂商: Linear Technology
文件页数: 9/18页
文件大小: 0K
描述: IC CONV DC/DC 400MA HIEFF 10-DFN
标准包装: 2,500
应用: 转换器,能量收集
输入电压: 0.23 V ~ 5 V
输出数: 1
输出电压: 1.5 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
供应商设备封装: 10-DFN(3x3)
包装: 带卷 (TR)
LTC3105
OPERATION
TIME
1.4V
V AUX
V LDO
V OUT
START-UP MODE NORMAL OPERATION
LDO IN
REGULATION
V OUT SYNCHRONOUS
RECTIFIER ENABLED
V OUT IN
REGULATION
V OUT = V AUX
TIME
3105 F01
Figure 1. Typical Converter Start-Up Sequence
above V AUX , an internal switch is enabled to connect the
two outputs together.
If V IN is greater than the voltage on the driven output (V OUT
or V AUX ), or the driven output is less than 1.2V (typical),
the synchronous rectifiers are disabled. With the synchro-
nous rectifiers disabled, the converter operates in critical
conduction mode. In this mode, the N-channel MOSFET
between SW and GND is enabled and remains on until the
inductor current reaches the peak current limit. It is then
disabled and the inductor current discharges completely
before the cycle is repeated.
When the output voltage is greater than the input voltage
and greater than 1.2V, the synchronous rectifier is enabled.
In this mode, the N-channel MOSFET between SW and
GND is enabled until the inductor current reaches the peak
current limit. Once current limit is reached, the N-channel
MOSFET turns off and the P-channel MOSFET between SW
and the driven output is enabled. This switch remains on
until the inductor current drops below the valley current
limit and the cycle is repeated.
When V OUT reaches the regulation point, the N- and P-
channel MOSFETs connected to the SW pin are disabled
and the converter enters sleep.
Auxiliary LDO
The integrated LDO provides a regulated 6mA rail to
power microcontrollers and external sensors. When the
input voltage is above the minimum of 225mV, the LDO is
powered from the AUX output allowing the LDO to attain
regulation while the main output is still charging. The LDO
has a 12mA current limit and an internal 1ms soft-start
to eliminate inrush currents. The LDO output voltage is
set by the FBLDO pin. If a resistor divider is connected
to this pin, the ratio of the resistors determines the LDO
output voltage. If the FBLDO pin is connected directly to
GND, the LDO will use a 2MΩ internal divider network to
program a 2.2V nominal output voltage. The LDO should
be programmed for an output voltage less than the pro-
grammed V OUT .
3105fa
9
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