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参数资料
| 型号： | LTC3221EDC#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP DBL ADJ 6DFN |
| 标准包装： | 2,500 |
| 类型： | 切换式电容器（充电泵），倍增器 |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调 |
| 输入电压： | 1.8 V ~ 5.5 V |
| PWM 型： | Burst Mode? |
| 频率 - 开关： | 600kHz |
| 电流 - 输出： | 60mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 6-DFN-EP（2x2） |
LTC3221/
LTC3221-3.3/LTC3221-5
APPLICATIO S I FOR ATIO
depends on many factors such as the oscillator frequency
(f OSC ), value of the ?ying capacitor (C FLY ), the nonoverlap
time, the internal switch resistances (R S ) and the ESR of
the external capacitors. A ?rst order approximation for
R OL is given below:
ESR of the output capacitor. It is proportional to the input
voltage, the value of the ?ying capacitor and the ESR of
the output capacitor.
A smaller output capacitor and/ or larger output current
load will result in higher ripple due to higher output volt-
R OL ? 2 ∑
S = 1 TO 4
R S +
1
f OSC ? C FLY
age slew rates.
There are several ways to reduce output voltage ripple.
For applications requiring lower peak-to-peak ripple, a
Typical R OL values as a function of temperature are shown
in Figure 2.
larger C OUT capacitor (4.7μF or greater) is recommended.
A larger capacitor will reduce both the low and high fre-
quency ripple due to the lower charging and discharging
15
V IN = 1.8V
slew rates, as well as the lower ESR typically found with
14 V OUT = 3V
13
12
11
10
9
8
higher value (larger case size) capacitors. A low ESR ce-
ramic output capacitor will minimize the high frequency
ripple, but will not reduce the low frequency ripple unless
a high capacitance value is used.
V IN , V OUT Capacitor Selection
The style and value of capacitors used with the LTC3221
7
6
5
–50
–25
0
25
50
75
100
family determine several important parameters such as
output ripple, charge pump strength and minimum start-
up time.
TEMPERATURE ( ° C)
3221 F02
To reduce noise and ripple, it is recommended that low
Figure 2. Effective Open-Loop Output Resistance vs Temperature
Output Ripple
Low frequency regulation mode ripple exists due to the
hysteresis in the comparator CMP and propagation delay
in the charge pump control circuit. The amplitude and
frequency of this ripple are heavily dependent on the load
current, the input voltage and the output capacitor size.
The LTC3221 family uses a controlled current, I SW to deliver
current to the output. This helps to keep the output ripple
fairly constant over the full input voltage range. Typical
combined output ripple for the LTC3221-3.3 with V IN =
2V under maximum load is 35mV P-P using a 4.7μF 6.3V
X5R case size 0603 output capacitor.
A high frequency ripple component may also be present
on the output capacitor due to the charge transfer action
of the charge pump. In this case the output can display
a voltage pulse during the charging phase. This pulse
results from the product of the charging current and the
ESR (< 0.1 Ω ) capacitors be used for both C IN and C OUT .
These capacitors should be either ceramic or tantalum
and should be 2.2μF or greater. Aluminum capacitors are
not recommended because of their high ESR.
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or alumi-
num should never be used for the ?ying capacitor since
its voltage can reverse upon start-up of the LTC3221.
Low ESR ceramic capacitors should always be used for
the ?ying capacitor.
The ?ying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to have at least 0.6μF of capacitance for the
?ying capacitor. For very light load applications, the ?ying
capacitor may be reduced to save space or cost.From the
?rst order approximation of R OL in the section “Effective
Open-Loop Output Resistance,” the theoretical minimum
output resistance of a voltage doubling charge pump can
3221f
8
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