参数资料
型号: LTC3252EDE#TRPBF
厂商: Linear Technology
文件页数: 8/12页
文件大小: 0K
描述: IC REG BUCK SWITCHED CAP 12DFN
标准包装: 2,500
类型: 降压(降压),切换电容(充电泵)
输出类型: 可调式
输出数: 2
输出电压: 0.9 V ~ 1.6 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: Burst Mode?
频率 - 开关: 1MHz ~ 1.6MHz
电流 - 输出: 250mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 12-DFN(4x3)
LTC3252
OPERATIO
(Refer to Simplified Block Diagram)
Output Capacitor Selection
The style and value of capacitors used with the LTC3252
determine several important parameters such as regulator
control loop stability, output ripple and charge pump
strength.
tance required for good transient response (see the Ce-
ramic Capacitor Selection Guidelines section).
Likewise excessive ESR on the output capacitor will tend
to degrade the loop stability of the LTC3252. The closed
loop output impedance of the LTC3252 is approximately:
The switching nature of the LTC3252 minimizes output
noise significantly but not completely. What small ripple
that exists at an output is controlled by the value of output
R O = 0 . 08 ? ?
V OUT
0 . 8 V
capacitor directly. Increasing the size of the output capaci-
tor will proportionately reduce the output ripple. The ESR
(equivalent series resistance) of the output capacitor plays
the dominant role in output noise. When the LTC3252
switches between clock phases there is a period where all
switches are turned off. This “blanking period” shows up
as a spike at the output and is a direct function of the output
current times the ESR value. To reduce output noise and
ripple, it is suggested that a low ESR (<0.08 ? ) ceramic
capacitor be used for the output capacitor. Tantalum and
aluminum capacitors are not recommended because of
their high ESR.
Both the style and value of the output capacitors can
significantly affect the stability of the LTC3252. As shown
in the Simplified Block Diagram, the LTC3252 uses a
control loop to adjust the strength of each charge pump to
For example, with the output programmed to 1.5V, the R O
is 0.15 ? , which produces a 38mV output change for a
250mA load current step. For stability and good load
transient response it is important for the output capacitor
to have 0.1 ? or less of ESR. Ceramic capacitors typically
have exceptional ESR and combined with a tight board
layout should yield excellent stability and load transient
performance.
Further output noise reduction can be achieved by filtering
the LTC3252 outputs through a very small series inductor
as shown in Figure 4. A 10nH inductor will reject the fast
output transients caused by the blanking period, thereby
presenting a nearly constant output voltage. For economy
the 10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
10nH
match the current required at the output. The error signal
OUT
V OUT
of each loop is stored directly on each output capacitor.
Thus the output capacitors also serve to form the domi-
nant pole in each control loop. Figure 3 is a graph of the
LTC3252
GND
4.7 μ F
0.47 μ F
3252 F04
recommended output capacitance, and minimum capaci-
8
Figure 4. 10nH Inductor Used for
Additional Output Noise Reduction
7
6
5
4
RECOMMENDED
CAPACITANCE
MINIMUM
V IN Capacitor Selection
The low noise, dual phase architecture used by the LTC3252
makes input noise filtering much less demanding than
conventional charge pump regulators. The LTC3252 input
current will transition between I OUT1 /2 and I OUT2 /2 for
each half cycle of the oscillator. The blanking period
3
2
0.9
1
1.1
CAPACITANCE
1.2 1.3 1.4
1.5
1.6
described in the V OUT section also effects the input. For
this reason it is recommended that a low ESR 4.7 μ F (1 μ F
min) or greater ceramic capacitor be used for C IN (see the
V OUT (V)
3252 F03
Figure 3. Output Capacitance vs Output Voltage
Ceramic Capacitor Selection Guidelines section). Alumi-
num and tantalum capacitors can be used but are not
recommended because of their high ESR.
3252f
8
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