参数资料
型号: LTC3406BES5#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 1.25 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PDSO5
封装: PLASTIC, MO-193, TSOT-23, 5 PIN
文件页数: 3/16页
文件大小: 231K
代理商: LTC3406BES5#PBF
11
LTC3406B
3406bfa
APPLICATIO S I FOR ATIO
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The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3406B in dropout at an
input voltage of 2.7V, a load current of 600mA and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 0.52. There-
fore, power dissipated by the part is:
PD = ILOAD2 RDS(ON) = 187.2mW
For the SOT-23 package, the θJA is 250°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.1872)(250) = 116.8°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (ILOAD ESR), where ESR is the effective series
resistance of COUT. ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steady-
state value. During this recovery time VOUT can be moni-
tored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 CLOAD).
Thus, a 10F capacitor charging to 3.3V would require a
250s rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406B. These items are also illustrated graphically in
Figures 5 and 6. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
VFB node.
5. Keep the (–) plates of CIN and COUT as close as possible.
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