参数资料
型号: LTC3407AIDD#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: DUAL SWITCHING CONTROLLER, PDSO10
封装: 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-2, DFN-10
文件页数: 5/16页
文件大小: 283K
代理商: LTC3407AIDD#PBF
LTC3407A
13
3407afa
APPLICATIONS INFORMATION
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efciency, the
current in these resistors should be kept small. Choosing
2μA with the 0.6V feedback voltage makes R1~300k. A close
standard 1% resistor is 280k, and R2 is then 887k.
The POR pin is a common drain output and requires a pull-
up resistor. A 100k resistor is used for adequate speed.
Figure 3 shows the complete schematic for this design
example. The specic passive components chosen allow
for a 1mm height power supply that maintains a high ef-
ciency across load.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3407A. These items are also illustrated graphically
in the layout diagram of Figure 2. Check the following in
your layout:
1. Does the capacitor CIN connect to the power VIN (Pin 3)
and GND (exposed pad) as closely as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are COUT and L1 closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3. The resistor divider formed by R1 and R2 must be
connected between the (+) plate of COUT and a ground
sense line terminated near GND (exposed pad). The
feedback signals VFB1 and VFB2 should be routed away
from noisy components and traces, such as the SW lines
(Pins 4 and 7), and their traces should be minimized.
4. Keep sensitive components away from the SW pins. The
input capacitor CIN and the resistors R1 to R4 should be
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
point. Addtionally the two grounds should not share
the high current paths of CIN or COUT.
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to VIN or GND.
Figure 2. LTC3407A Layout Diagram (See Board Layout Checklist)
RUN/SS2
VIN
VOUT2
VOUT1
RUN/SS1
POR
SW1
VFB1
GND
VFB2
SW2
MODE/SYNC
LTC3407A
CIN
C4
C5
L1
L2
R4
R2
R1
R3
COUT2
COUT1
3407A F02
BOLD LINES INDICATE HIGH CURRENT PATHS
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