参数资料
型号: LTC3410BESC6-1.8#TRPBF
厂商: Linear Technology
文件页数: 12/16页
文件大小: 0K
描述: IC REG BUCK SYNC 1.8V .3A SC70-6
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 1.8V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 2.25MHz
电流 - 输出: 300mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-TSSOP,SC-88,SOT-363
包装: 带卷 (TR)
供应商设备封装: SC-70-6
LTC3410B
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3410B. These items are also illustrated graphically in
Figures 4 and 5. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V IN trace should be kept short, direct and
wide.
2. Does the V FB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C OUT and ground.
3. Does the (+) plate of C IN connect to V IN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of C IN and C OUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
V FB node.
1
RUN
1
RUN
V OUT
+
C OUT
L1
2
3
LTC3410B
GND V FB
SW V IN
5
C IN
6
4
R2
C FWD
R1
V IN
V OUT
+
C OUT
L1
2
3
LTC3410B-1.875
GND V OUT
SW V IN
5
C IN
6
4
V IN
BOLD LINES INDICATE HIGH CURRENT PATHS
3410B F04a
BOLD LINES INDICATE HIGH CURRENT PATHS
3410B F04b
Figure 4a. LTC3410B Layout Diagram
R1
VIA TO GND
Figure 4b. LTC3410B-1.875 Layout Diagram
V OUT
L1
PIN 1
VIA TO V IN
LTC3410B
R2
C FWD
V IN
VIA TO V OUT
V OUT
L1
PIN 1
VIA TO V IN
LTC3410B-
1.875
V IN
SW
SW
C OUT
C IN
C OUT
C IN
GND
Figure 5a. LTC3410B Suggested Layout
3410B F05a
Figure 5b. LTC3410B Fixed Output Voltage
3410B F05b
Suggested Layout
3410bfa
12
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