参数资料
型号: LTC3421EUF#PBF
厂商: Linear Technology
文件页数: 13/16页
文件大小: 0K
描述: IC REG BOOST SYNC ADJ 1.5A 24QFN
标准包装: 91
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.4 V ~ 5.25 V
输入电压: 0.5 V ~ 4.5 V
PWM 型: 电流模式,混合
频率 - 开关: 100kHz ~ 3MHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 24-QFN 裸露焊盘(4x4)
产品目录页面: 1334 (CN2011-ZH PDF)
LTC3421
APPLICATIO S I FOR ATIO
volts ? seconds of the inductor will reverse during the time
current is flowing to the output. Since this mode will
dissipate more power in the IC, the maximum output
current is limited in order to maintain an acceptable
junction temperature.
Closing the Feedback Loop
The LTC3421 uses current mode control with internal
adaptive slope compensation. Current mode control elimi-
nates the 2nd order filter due to the inductor and output
capacitor exhibited in voltage mode controllers, and sim-
I OUT ( MAX ) =
40 ? ( ( V IN + 1 . 5 ) – V OUT
125 – T A
)
plifies it to a single pole filter response. The product of the
modulator control to output DC gain and the error amp
open-loop gain gives the DC gain of the system:
G CONTROL =
, G EA ≈ 2000
where T A = ambient temperature.
For example at V IN = 4.5V and V OUT = 3.3V, the maximum
output current is 370mA.
Short Circuit
The LTC3421 output disconnect feature allows output short
G DC = G CONTROL_OUTPUT ? G EA ?
2 ? V IN
I OUT
The output filter pole is given by:
V REF
V OUT
circuit while maintaining a maximum set current limit. The
IC has incorporated internal features such as current limit
and thermal shutdown for protection from an excessive
f FILTER _ POLE =
I OUT
π ? V OUT ? C OUT
overload or short circuit. In applications that require a pro-
longed short circuit, it is recommended to limit the power
dissipation in the IC to maintain an acceptable junction
where C OUT is the output filter capacitor.
The output filter zero is given by:
temperature. The circuit in Figure 2 will limit the maximum
current during a prolonged short by reducing the current
f FILTER _ ZERO =
1
2 ? π ? R ESR ? C OUT
limit value in a short circuit by disconnecting R2 with the
N-channel MOSFET switch. R3 and C1 provide a soft-start
function after a short circuit. Resistor R1 lowers the cur-
rent limit value as V IN rises, maintaining a relatively con-
where R ESR is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right-half plane zero (RHP) and is given by:
stant power. The current limit equation for the circuit in
Figure 2 is given by:
f RHPZ =
V IN 2
2 ? π ? I OUT ? L
I LIMIT = ?
V – 0 . 6 ?
? ? 250
? 0 . 6
? R LIM
– IN
R 1 ?
At heavy loads this gain increase with phase lag can occur
at a relatively low frequency. The loop gain is typically
where I LIMIT is in Amps; R LIM and R1 are in k ? .
rolled off before the RHP zero frequency.
The typical error amp compensation is shown in Figure 3.
f POLE 1 ≈
2 ? π ? 20 e 6 ? C C 1
I LIM
8
TO V IN
R1
1M
VN2222
R3
10k
TO V OUT
The equations for the loop dynamics are as follows:
1
which is extremely close to DC
R LIM
100k
R2
50k
C1
0.1 μ F
f ZERO 1 ≈
1
2 ? π ? R Z ? C C 1
3421 F02
Figure 2. Current Limit Foldback Circuit for
f POLE 2 ≈
1
2 ? π ? R Z ? C C 2
Extended Short Conditions
3421f
13
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