参数资料
型号: LTC3422EDD#TRPBF
厂商: Linear Technology
文件页数: 11/16页
文件大小: 0K
描述: IC REG BOOST SYNC ADJ 1.5A 10DFN
标准包装: 2,500
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.25 V ~ 5.25 V
输入电压: 0.5 V ~ 4.5 V
PWM 型: 电流模式,混合
频率 - 开关: 100kHz ~ 3MHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-DFN(3x3)
LTC3422
OPERATIO
the input source. It also allows for inrush current limiting
at turn-on, minimizing surge currents seen by the input
supply. Note that to obtain the advantages of output
disconnect, there must not be any external Schottky
diodes connected between the SW pin and V OUT .
It should also be noted that the LTC3422 provides inrush
current limiting without reducing the maximum load cur-
rent capability during start-up. The internally set peak
current command of the LTC3422 is allowed to gradually
increase during the soft-start period until it reaches the
nominal maximum level.
APPLICATIO S I FOR ATIO
Note: Board layout is extremely critical to minimize voltage
overshoot on SW due to stray inductance. Keep the output
filter capacitors as close as possible to V OUT and use very
low ESR/ESL ceramic capacitors tied to a good ground
plane.
V OUT
where:
f = Operating Frequency in MHz
Ripple = Allowable Inductor Current Ripple (Amps
Peak-Peak)
V IN(MIN) = Minimum Input Voltage
V OUT(MAX) = Maximum Output Voltage
V IN
1 SW
2 V IN
3 BURST
4 SS
5 SHDN
LTC3422
V OUT 10
9
SYNC
8
R T
V C
7
FB
6
MULTIPLE VIAS
3422 F01
The inductor current ripple is typically set 20% to 40% of
the maximum inductor current.
For high efficiency, choose an inductor with high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I 2 R losses and must be
able to handle the peak inductor current without saturat-
TO GROUND PLANE
Figure 1. Recommended Component Placement. Traces
Carrying High Current are Direct (GND, SW, V IN , V OUT ). Trace
Area at FB and V C are Kept Low. Lead Length to Battery Should
be Kept Short. V IN and V OUT Ceramic Capacitors Should be as
Close to the LTC3422 Pins as Possible
ing. Molded chokes or chip inductors usually do not have
enough core to support peak inductor currents in the 2A
to 3A region. To minimize radiated noise, use a toroidal or
shielded inductor. See Table 1 for suggested inductor
suppliers and Table 2 for a list of capacitor suppliers.
Table 1. Inductor Vendor Information
COMPONENT SELECTION
SUPPLIER PHONE
FAX
WEB SITE
Coilcraft (847) 639-6400 (847) 639-1469
www.coilcraft.com
Inductor Selection
The high frequency operation of the LTC3422 allows the
use of small surface mount inductors. The minimum
inductance value is proportional to the operating fre-
CoEv (800) 277-7040 (650) 361-2508
Magnetics
Murata USA: USA:
(814) 237-1431 (814) 238-0490
(800) 831-9172
www.circuitprotection.
com/magnetics.asp
www.murata.com
quency and is limited by the following constraints:
Sumida
USA:
(847) 956-0666
USA: www.sumida.com
(847) 956-0702
L >
3 and L > V IN(MIN) ? ( V OUT ( MAX ) – V IN ( MIN )
? ? ? Ripple ? V OUT(MAX)
)
TDK
TOKO
Japan: Japan:
81-3-3607-5111 81-3-3607-5144
(847) 803-6100 (847) 803-6296 www.component.tdk.com
(847) 297-0070 (847) 669-7864 www.toko.com
Wurth
(201) 785-8800 (201) 785-8810 www.we-online.com
3422fa
11
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