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参数资料
| 型号： | LTC3429ES6#TRM |
| 厂商： | Linear Technology |
| 文件页数： | 5/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BST SYNC ADJ .6A TSOT23-6 |
| 标准包装： | 500 |
| 类型： | 升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 2.5 V ~ 4.3 V |
| 输入电压： | 0.5 V ~ 4.4 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 500kHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | TSOT-23-6 |
| 其它名称： | LTC3429ES6 LTC3429ES6-ND |
LTC3429/LTC3429B
PI FU CTIO S
SW (Pin 1): Switch Pin. Connect inductor between SW
and V IN . Keep these PCB trace lengths as short and wide
as possible to reduce EMI and voltage overshoot. If the
inductor current falls to zero, or SHDN is low, an internal
150 ? antiringing switch is connected from SW to V IN to
minimize EMI.
GND (Pin 2): Signal and Power Ground. Provide a short
direct PCB path between GND and the (–) side of the output
capacitor(s).
FB (Pin 3): Feedback Input to the g m Error Amplifier.
Connect resistor divider tap to this pin. The output voltage
can be adjusted from 2.5V to 5V by:
V OUT = 1.23V ? [1 + (R1/R2)]
SHDN (Pin 4): Logic Controlled Shutdown Input.
SHDN = High: Normal free running operation, 500kHz
SHDN = Low: Shutdown, quiescent current < 1 μ A.
Output capacitor can be completely discharged through
the load or feedback resistors. A 150 ? resistor is
internally connected between SW and V IN .
V OUT (Pin 5): Output Voltage Sense Input and Drain of the
Internal Synchronous Rectifier MOSFET. Bias is derived
from V OUT . PCB trace length from V OUT to the output filter
capacitor(s) should be as short and wide as possible. V OUT
is completely disconnected from V IN when SHDN is low
due to the output disconnect feature.
V IN (Pin 6): Battery Input Voltage. The device gets its
start-up bias from V IN . Once V OUT exceeds V IN , bias
comes from V OUT . Thus, once started, operation is com-
pletely independent from V IN . Operation is only limited by
the output power level and the battery’s internal series
resistance.
typical operating frequency.
BLOCK DIAGRA
L1
+
1V TO 4.4V
6 V IN
C IN
1 SW
V OUT
GOOD
V IN
START-UP
OSC
A
B
A/B
MUX
2.3V
0.45 ?
WELL
SWITCH
V OUT
5
2.5V TO 5V
PWM
CONTROL
SYNC
DRIVE
CONTROL
0.35 ?
RAMP
GEN
500kHz
SLOPE
COMP
Σ
CURRENT
SENSE
C PL
(OPTIONAL)
R1
PWM
COMPARATOR
FB
g m
ERROR
3
C OUT
SLEEP
Burst Mode
OPERATION
CONTROL
R C
80k
C C
150pF
C P2
2.5pF
AMP
1.23V
REF
R2
SHDN
4
SHUTDOWN
CONTROL
SHUTDOWN
2 GND
3429 BD
3429fa
5
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