参数资料
型号: LTC3456EUF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: 0.9 A BATTERY CHARGE CONTROLLER, 1200 kHz SWITCHING FREQ-MAX, PQCC24
封装: 4 X 4 MM, PLASTIC, MO-220-WGGD, QFN-24
文件页数: 18/28页
文件大小: 358K
代理商: LTC3456EUF
18
LTC3456
3456f
RESET
The LTC3456 contains a RESET circuitry that is active
during both power-up and shutdown. The RESET pin is
held low during initial power-up. When both the V
INT
and
Core outputs come into regulation, a reset delay timer gets
activated. There is a full 262ms timeout before RESET is
released. During power-off mode RESET is pulled low.
This prevents the microprocessor from entering into any
spurious operating mode.
MODE
The LTC3456 has a user selectable MODE pin. When the
MODE pin is pulled logic high and the LTC3456 is battery
powered, the device will automatically enter into Burst
Mode operation under light load current situations. If the
load current in either of the regulators falls below a
predetermined value, the regulator will enter into Burst
Mode operation independent of the other regulator. When
the MODE pin is connected to ground, continuous PWM
operation is selected. It provides the lowest output voltage
ripple and current ripple, albeit at the cost of lower
efficiency under light load conditions.
OPERATIOU
The Burst Mode operation is disabled when the device is
USB or wall powered. The device operates in forced PWM
mode when powered from USB or wall input (irrespective
of the state of the MODE pin). Also, at initial power up, the
device operates in forced PWM mode during the 262ms
initial delay timeout.
Figure 9 shows the Main and Core converters in Burst
Mode operation.
PWRKEY
V
CORE
PWRKEY
PULLED LOW
PWRKEY
RELEASED
RESET
262ms
TIMEOUT
POWER-ON SEQUENCE
POWER-OFF SEQUENCE
PWRON
PBSTAT
3456 F08
Figure 8. Power-On/Power-Off Sequence
Figure 9. The LTC3456 in Burst Mode Operation
V
100mV/DIV
(AC COUPLED)
V
CORE
100mV/DIV
(AC COUPLED)
I
L1
100mA/DIV
I
L2
500mA/DIV
20
μ
s/DIV
V
BATT
= 2.4V
I
MAIN
= 37.5mA
I
CORE
= 6.2mA
3456 F09
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