参数资料
型号: LTC3532EMS#TRPBF
厂商: Linear Technology
文件页数: 8/16页
文件大小: 0K
描述: IC REG BUCK BST SYNC 0.5A 10MSOP
标准包装: 2,500
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.4 V ~ 5.25 V
输入电压: 2.4 V ~ 5.5 V
PWM 型: Burst Mode?
频率 - 开关: 300kHz ~ 2MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
LTC3532
OPERATIO
88%
D MAX
BOOST
A ON, B OFF
PWM CD SWITCHES
BOOST REGION
V4 (≈2.05V)
V IN =
V OUT
1 – (150ns ? f)
D MIN
BOOST
V3 (≈1.65V)
The point at which the 4-switch region ends is given by:
D MAX
BUCK
FOUR SWITCH PWM
BUCK/BOOST REGION
V2 (≈1.55V)
V IN = V OUT (1 – D) = V OUT (1 – 150ns ? f) V
D ON, C OFF
PWM AB SWITCHES BUCK REGION
Boost Region (V IN < V OUT )
0%
V1 (≈0.9V)
Switch A is always on and switch B is always off dur-
DUTY
CYCLE
3532 F02
INTERNAL
CONTROL
VOLTAGE, V CI
ing this mode. When the internal control voltage, V CI , is
above voltage V3, switch pair CD will alternately switch
to provide a boosted output voltage. This operation is like
Figure 2. Switch Control vs Internal Control Voltage, V CI
Buck Region (V IN > V OUT )
Switch D is always on and switch C is always off dur-
ing this mode. When the internal control voltage, V CI , is
above voltage V1, output A begins to switch. During the
off-time of switch A, synchronous switch B turns on for
the remainder of the time. Switches A and B will alternate
like a typical synchronous buck regulator. As the control
voltage increases, the duty cycle of switch A increases
until the maximum duty cycle of the converter in buck
mode reaches D MAX_BUCK , given by:
D MAX_BUCK = 100 – D4 SW %
where D4 SW = duty cycle % of the 4-switch range.
D4 SW = (150ns ? f) ? 100 %
where f = operating frequency, Hz.
Beyond this point the “4-switch,” or buck/boost region
is reached.
Buck/Boost or 4-Switch (V IN ~ V OUT )
a synchronous boost regulator. The maximum duty cycle
of the converter is limited to 88% typical and is reached
when V CI is above V4.
Burst Mode OPERATION
Burst Mode operation occurs when the IC delivers energy
to the output until it is regulated and then goes into a sleep
mode where the outputs are off and the IC is consuming
only 35μA of quiescent current from V IN . In this mode the
output ripple has a variable frequency component that
depends upon load current, and will typically be about
2% peak-to-peak. Burst Mode operation ripple can be
reduced slightly by using more output capacitance (47μF
or greater). Another method of reducing Burst Mode
operation ripple is to place a small feedforward capacitor
across the upper resistor in the V OUT feedback divider
network (as in Type III compensation). During the period
where the device is delivering energy to the output, the
peak switch current will be equal to 250mA typical and
the inductor current will terminate at zero current for each
cycle. In this mode the typical maximum average output
current is given by:
When the internal control voltage, V CI , is above voltage
V2, switch pair AD remain on for duty cycle D MAX_BUCK ,
and the switch pair AC begins to phase in. As switch pair
I OUT(MAX)BURST ≈
0.2 ? V IN
V OUT + V IN
A
AC phases in, switch pair BD phases out accordingly.
When the V CI voltage reaches the edge of the buck/boost
range, at voltage V3, the AC switch pair completely phase
out the BD pair, and the boost phase begins at duty cycle
D4 SW . The input voltage, V IN , where the 4-switch region
begins is given by:
3532fc
8
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