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| 型号： | LTC3541EDD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 368K |
| 描述： | IC REG DL BCK/LINEAR SYNC 10-DFN |
| 产品培训模块： | More Information on LDOs |
| 标准包装： | 121 |
| 拓扑： | 降压（降压）同步（1），线性（LDO）（1） |
| 功能： | 任何功能 |
| 输出数： | 2 |
| 频率 - 开关： | 2.25MHz |
| 电压/电流 - 输出 1： | 0.8 V ~ 5 V，500mA |
| 电压/电流 - 输出 2： | 0.4 V ~ 4.1 V，300mA |
| 带 LED 驱动器： | 无 |
| 带监控器： | 无 |
| 带序列发生器： | 是 |
| 电源电压： | 0.9 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 管件 |
LTC3541
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Table 1. LTC3541 Control Pin Truth Table
PIN NAME
OPERATIONAL DESCRIPTION
ENBUCK ENVLDO MODE
0
0 X LTC3541 Powered Down
0
1 X Buck Powered Down, VLDO Regulator
Powered Down, Linear Regulator
Enabled
1
0 0 Buck Enabled, VLDO Regulator Powered
Down, Linear Regulator Powered Down,
Burst Mode Operation
1
0 1 Buck Enabled, VLDO Regulator Powered
Down, Linear Regulator Powered Down,
Pulse-Skip Mode Operation
1
1 0 Buck Enabled, VLDO Regulator Enabled,
Linear Regulator Powered Down, Burst
Mode Operation
1
1 1 Buck Enabled, VLDO Regulator Enabled,
Linear Regulator Powered Down, Pulse-
Skip Mode Operation
V
IN
(Pin 1): Main Supply Pin. This pin must be closely
decoupled to GND with a 10礔 or greater capacitor.
ENBUCK (Pin 2): Buck Enable Pin. This pin enables the
buck regulator when driven to a logic high.
BUCKFB (Pin 3): Buck Regulator Feedback Pin. This pin
receives the buck regulators feedback voltage from an
external resistive divider.
LFB (Pin 4): VLDO/Linear Regulator Feedback Pin. This
pin receives either the VLDO or linear regulators feedback
voltage from an external resistive divider.
LV
OUT
(Pin 5): VLDO/Linear Regulator Output Pin. This
pin provides the regulated output voltage from the VLDO
or linear regulator.
LV
IN
(Pin 6): VLDO/Linear Regulator Input Supply Pin.
This pin provides the input supply voltage for the VLDO
power FET.
GND (Pin 7): Analog Ground Pin.
MODE (Pin 8): Buck Mode Selection Pin. This pin enables
buck Pulse-Skip operation when driven to a logic high
and enables buck Burst Mode operation when driven to
a logic low.
ENVLDO (Pin 9): VLDO/Linear Regulator Enable Pin.
When driven to a logic high, this pin enables the linear
regulator when the ENBUCK pin is driven to a logic low,
and enables the VLDO when the ENBUCK pin is driven to
a logic high.
SW (Pin 10): Switch Node Pin. This pin connects the
internal main and synchronous power MOSFET switches
to the external inductor for the buck regulator.
Exposed Pad (Pin 11): Ground Pin. This pin must be
soldered to the PCB to provide both electrical contact to
ground and good thermal contact to the PCB.
Note: Table 1 details the truth table for the control pins
of the LTC3541.
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| LTC3542EDC#TRPBF | 功能描述:IC REG BUCK SYNC ADJ 0.5A 6DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:500 系列:- 类型:切换式电容器（充电泵），反相 输出类型:固定 输出数:1 输出电压:-3V 输入电压:2.3 V ~ 5.5 V PWM 型:Burst Mode? 频率 - 开关:900kHz 电流 - 输出:100mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 包装:带卷 (TR) 供应商设备封装:TSOT-23-6 其它名称:LTC1983ES6-3#TRMTR |
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