参数资料
型号: LTC3562EUD#TRPBF
厂商: Linear Technology
文件页数: 17/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ QUAD 20QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 4
输出电压: 425 mV ~ 800 mV,0.6 V ~ 3.78 V
输入电压: 2.85 V ~ 5.5 V
PWM 型: 多重
频率 - 开关: 2.25MHz
电流 - 输出: 400mA,600mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 20-QFN 裸露焊盘(3x3)
LTC3562
APPLICATIONS INFORMATION
very thin (<1mm tall) ceramic capacitors ideal for use in
height-restricted designs. Table 8 shows a list of several
ceramic capacitor manufacturers.
Table 8. Recommended Ceramic Capacitor Manufacturers
result in higher thermal resistances.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitors, inductors, and
output capacitors be as close to the LTC3562 as possible
AVX
Murata
Taiyo Yuden
Vishay Siliconix
TDK
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.tdk.com
and that there be an unbroken ground plane under the
LTC3562 and all of its external high frequency compo-
nents. High frequency currents on the LTC3562 tend to
?nd their way along the ground plane in a myriad of paths
ranging from directly back to a mirror path beneath the
incident path on the top of the board. If there are slits or
Printed Circuit Board Layout Considerations
To deliver maximum current under all conditions, it is critical
that the exposed metal pad on the backside of the LTC3562
package be soldered to the PC board ground. Correctly
soldered to a 2500mm 2 double-sided 1oz. copper board,
the LTC3562 has a thermal resistance of less than 68°C/W.
Failure to make thermal contact between the exposed pad
on the backside of the package and the copper board will
cuts in the ground plane due to other traces on that layer,
the current will be forced to go around the slits. If high
frequency currents are not allowed to ?ow back through
their natural least-area path, excessive voltage will build
up and radiated emissions will occur. There should be a
group of vias directly under the grounded backside of the
package leading directly down to an internal ground plane.
To minimize parasitic inductance, the ground plane should
be on the second layer of the PC board.
3562 F05
Figure 5. High Frequency Ground Currents Follow Their Incident Path.
Slices in the Ground Cause High Voltage and Increased Emissions.
3562fa
17
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