参数资料
型号: LTC3569IUD#PBF
厂商: Linear Technology
文件页数: 10/26页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ TRPL 20QFN
标准包装: 91
类型: 降压(降压)
输出类型: 可调式
输出数: 3
输出电压: 0.43 V ~ 5.5 V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 2.25MHz,1MHz ~ 3MHz
电流 - 输出: 600mA,1.2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 20-QFN 裸露焊盘(3x3)
LTC3569
OPERATION
Introduction
The LTC3569 contains three constant-frequency, current
mode buck DC/DC regulators. Both the P-channel and
synchronous rectifier (N-channel) switches are internal
to each buck. The operating frequency is determined by
the value of the R T resistor, or is fixed to 2.25MHz by pull-
ing the R T pin to SV IN , or is synchronized to an external
oscillator tied to the MODE pin. Users may select pulse-
skipping or Burst Mode operation to trade off output ripple
for efficiency. Independent programmable reference levels
allow the LTC3569 to suit a variety of applications.
The LTC3569 offers different power levels, a single 1.2A
buck as well as two 600mA bucks. These three bucks
may be configured in different parallel configurations,
for versatile high current operation. The power stage of
buck 2 can be configured as a slave to buck 1, by pulling
FB2 to SV IN . The power stage of buck 3, can be configured
to be a slave to buck 2, by pulling the FB3 pin to SV IN . To
enable the slave power stage, pull the respective EN pin
high. However if the master is disabled, the slave power
stage is Hi-Z.
Each of the buck regulators supports 100% duty cycle
operation (low dropout mode) when their input voltage
drops very close to their output voltage. The switching
regulators also include soft-start to limit inrush current
when powering on, and short-circuit current protection.
Main Control Loop
During normal operation, the top power switch (P-chan-
nel MOSFET) is turned on at the beginning of a clock
cycle. The P-channel current ramps up as the inductor
charges. The peak inductor current is controlled by the
internally compensated error amplifier output, I TH . The
current comparator (PCOMP) turns off the P-channel and
turns on the N-channel synchronous rectifier when the
inductor current reaches the I TH level minus the offset of
the slope compensation ramp. The energy stored in the
inductor continues to flow through the bottom switch
(N-channel) and into the load until either the inductor
current approaches zero, or the next clock cycle begins.
If the inductor current approaches zero the N comparator
V REF
MODE
BURST
CLAMP
P COMP
SLOPE
I LIM
SOFT
START
ON
P VIN
V FB
S VIN
SLAVE
SD
EA EA
SLAVE
I TH
NOR
NAND
GATE
CLK
S Q
P-LATCH
R
SLAVE
I LIM
SWITCHING
LOGIC,
BLANKING,
ANTI SHOOT-THRU
P-CHANNEL
SW
N-CHANNEL
SLEEP
FROM MASTER
P ON
N OFF
P GND
V REF
PGOOD
N COMP
ON
SLAVE
NOR
+
3569 F02
Figure 2. Buck Block Diagram
3569fd
10
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